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[23.128.96.18]) by mx.google.com with ESMTP id v18si9566603ioh.67.2021.07.04.05.57.22; Sun, 04 Jul 2021 05:57:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f79d9veS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229537AbhGDM4T (ORCPT + 99 others); Sun, 4 Jul 2021 08:56:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229492AbhGDM4S (ORCPT ); Sun, 4 Jul 2021 08:56:18 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D087C061574 for ; Sun, 4 Jul 2021 05:53:42 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id t17so27467771lfq.0 for ; Sun, 04 Jul 2021 05:53:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language; bh=QLgeN7qsgoC0DLRMMFhAZcwZGJpcUkGVVUVyLJzB3ZY=; b=f79d9veSkfHMZBi0tN++cwCro5dCH0Il2Z4LIFyQRW75BXmUsVxVDkaBCEHI2ZxxB0 rlkJVXch00UHy3c+2m/quattx0tKsnGd+jHcAZrYLkqrPiKg2NBYVF13OkUXThtm4tLt bR3Xy02e0My5vv89SjEQMNMQbdwDJae//8tfCe48g83io+JJQ8axPOCCctfXSs/a9jMh +1glWo0ogVWC1o0X3vaRbrG4nlVdM7DxdruZZ39t3GWyCUySFQc2+Mdm+TRbvCDFHpu/ LGz70BEQoBf5QsBnDr5GbRABK8EYCBWdu95dJrJVmYd1fK7oLP+ZfxOV8sfEmpncmU6Q 7Whw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language; bh=QLgeN7qsgoC0DLRMMFhAZcwZGJpcUkGVVUVyLJzB3ZY=; b=h9xUI/EDtW8g31qjiP8pZZhInpaY2IvXpxLbuQ/P9XfsgkBUnHalNjkQ68TcQiPUn6 HEyB/hW9O8JXn2St0lzwDDWi0KFHhr95R41eYd60s2BaEoVjpdQ+5OEBMcIW2+DGVswE O8PQv0WyauQrxeMna1kLU8x1F/m9QAtrIzfDD9KDKBqI+LD13sbF74BEgFdlq1iTXVmW 4GaiiUTSg3rBGWDj25IKtbutA4US+OpnrQ9mfXqsplPmA/8T0yIvX8VfH48+jmZFgaYd UZO6HjCkbsQTu63SipA7/6LIEagC4hvJUbSFkoB1+LfNectB3sqCpdjvWSqLmbyZuBAB 6WrA== X-Gm-Message-State: AOAM530o8iqDXSqXmp6CpJAYIA7eU3p69RbtWp/UOUj5ryYZdLGlp4Fn X4A3/mmvxnzPXgqGrY1+wPf6Zg== X-Received: by 2002:ac2:4d37:: with SMTP id h23mr2792472lfk.177.1625403220442; Sun, 04 Jul 2021 05:53:40 -0700 (PDT) Received: from [192.168.1.211] ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id o1sm147350ljd.113.2021.07.04.05.53.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 04 Jul 2021 05:53:39 -0700 (PDT) Subject: Re: [PATCH v5 0/5] iommu/arm-smmu: adreno-smmu page fault handling To: Rob Clark , dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Jordan Crouse , Rob Clark , Akhil P Oommen , AngeloGioacchino Del Regno , Bjorn Andersson , Douglas Anderson , Eric Anholt , "Isaac J. Manjarres" , Joerg Roedel , John Stultz , Jonathan Marek , Konrad Dybcio , Krishna Reddy , "Kristian H. Kristensen" , Lee Jones , "moderated list:ARM SMMU DRIVERS" , open list , Marijn Suijten , Robin Murphy , Sai Prakash Ranjan , Sharat Masetty , Will Deacon , Zhenzhong Duan References: <20210610214431.539029-1-robdclark@gmail.com> From: Dmitry Baryshkov Message-ID: <2016473f-2b38-f049-1e8d-04bdf5af6cea@linaro.org> Date: Sun, 4 Jul 2021 15:53:38 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210610214431.539029-1-robdclark@gmail.com> Content-Type: multipart/mixed; boundary="------------A60D54CF24727FEAC44A0450" Content-Language: en-GB Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a multi-part message in MIME format. --------------A60D54CF24727FEAC44A0450 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Hi, I've had splash screen disabled on my RB3. However once I've enabled it, I've got the attached crash during the boot on the msm/msm-next. It looks like it is related to this particular set of changes. On 11/06/2021 00:44, Rob Clark wrote: > From: Rob Clark > > This picks up an earlier series[1] from Jordan, and adds additional > support needed to generate GPU devcore dumps on iova faults. Original > description: > > This is a stack to add an Adreno GPU specific handler for pagefaults. The first > patch starts by wiring up report_iommu_fault for arm-smmu. The next patch adds > a adreno-smmu-priv function hook to capture a handful of important debugging > registers such as TTBR0, CONTEXTIDR, FSYNR0 and others. This is used by the > third patch to print more detailed information on page fault such as the TTBR0 > for the pagetable that caused the fault and the source of the fault as > determined by a combination of the FSYNR1 register and an internal GPU > register. > > This code provides a solid base that we can expand on later for even more > extensive GPU side page fault debugging capabilities. > > v5: [Rob] Use RBBM_STATUS3.SMMU_STALLED_ON_FAULT to detect case where > GPU snapshotting needs to avoid crashdumper, and check the > RBBM_STATUS3.SMMU_STALLED_ON_FAULT in GPU hang irq paths > v4: [Rob] Add support to stall SMMU on fault, and let the GPU driver > resume translation after it has had a chance to snapshot the GPUs > state > v3: Always clear FSR even if the target driver is going to handle resume > v2: Fix comment wording and function pointer check per Rob Clark > > [1] https://lore.kernel.org/dri-devel/20210225175135.91922-1-jcrouse@codeaurora.org/ > > Jordan Crouse (3): > iommu/arm-smmu: Add support for driver IOMMU fault handlers > iommu/arm-smmu-qcom: Add an adreno-smmu-priv callback to get pagefault > info > drm/msm: Improve the a6xx page fault handler > > Rob Clark (2): > iommu/arm-smmu-qcom: Add stall support > drm/msm: devcoredump iommu fault support > > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 23 +++- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 110 +++++++++++++++++++- > drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 42 ++++++-- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 15 +++ > drivers/gpu/drm/msm/msm_gem.h | 1 + > drivers/gpu/drm/msm/msm_gem_submit.c | 1 + > drivers/gpu/drm/msm/msm_gpu.c | 48 +++++++++ > drivers/gpu/drm/msm/msm_gpu.h | 17 +++ > drivers/gpu/drm/msm/msm_gpummu.c | 5 + > drivers/gpu/drm/msm/msm_iommu.c | 22 +++- > drivers/gpu/drm/msm/msm_mmu.h | 5 +- > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 50 +++++++++ > drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +- > drivers/iommu/arm/arm-smmu/arm-smmu.h | 2 + > include/linux/adreno-smmu-priv.h | 38 ++++++- > 15 files changed, 367 insertions(+), 21 deletions(-) > -- With best wishes Dmitry --------------A60D54CF24727FEAC44A0450 Content-Type: text/plain; charset=UTF-8; name="log-rb3-crash.txt" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="log-rb3-crash.txt" AABIYW5kbGluZyBDbWQ6IHNldF9hY3RpdmU6YQ0KU2V0QWN0aXZlU2xvdDogX2EgYWxyZWFk eSBhY3RpdmUgc2xvdA0KSGFuZGxpbmcgQ21kOiBkb3dubG9hZDowNjFiODgwMA0KRG93bmxv YWQgRmluaXNoZWQNCkhhbmRsaW5nIENtZDogYm9vdA0KQS9CIHJldHJ5IGNvdW50IE5PVCBk ZWNyZW1lbnRlZA0KQm9vdGluZyBJbnRvIE1pc3Npb24gTW9kZQ0KTm8gZHRibyBwYXJ0aXRp b24gaXMgZm91bmQsIFNraXAgZHRibw0KRXhpdCBrZXkgZGV0ZWN0aW9uIHRpbWVyDQpHZXRW bURhdGE6IG1ha2luZyBTY21DYWxsIHRvIGdldCBIeXBJbmZvDQpHZXRWbURhdGE6IE5vIFZt IGRhdGEgcHJlc2VudCEgU3RhdHVzID0gKDB4MykNCk5vIEZmYm0gY29va2llIGZvdW5kLCBp Z25vcmU6IE5vdCBGb3VuZA0KTWVtb3J5IEJhc2UgQWRkcmVzczogMHg4MDAwMDAwMA0KRGVj b21wcmVzc2luZyBrZXJuZWwgaW1hZ2Ugc3RhcnQ6IDMyMzEzIG1zDQpEZWNvbXByZXNzaW5n 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