Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp442764pxv; Thu, 8 Jul 2021 06:13:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJydz5eWwD2u809Su9CLVjY5izrFuCbfnrKifNulLJZzdCMYU/8mNTStML5oewVmmDge6H8K X-Received: by 2002:a05:6000:1787:: with SMTP id e7mr34218744wrg.167.1625750000936; Thu, 08 Jul 2021 06:13:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625750000; cv=none; d=google.com; s=arc-20160816; b=oI1kFYXtR1K6O0k1t5eubxxV5W3/XGglSpmEr2iKaT3SsTaQGym/r/TK23ImKry5d9 YwUn1sUdOH1GXopm7BwN9DFOzCGN+JO5Hz5ENqNfuK+gNHTYBjEWIb/BtFSTu0X1XD3r xGBDk8yxBh51CcJAuXG/tQhepwx6t0k2NB0LZzhCAVlQZjR9mMQW0xkjNjORprtrdlmj gaaXlGqBrpCspqv6BBsIqyWVNHGa8xkKQ8Z4wdiR6dcnt54VbuqxpVeYVkUFYzY08mlS aJCH2+9608f0I3t+SFWPiBStWigRd03HJ9aZ+u35wjZFgwZF+7IEQ4sUlKhlDaqSUYZ+ FybA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=gS8AFk63aQm9ubdaiQKcXkzcytAXfuI8lQWGTpI+e3o=; b=vtSDzHCGXCwBww2YIsUj4mDlUiL+4ji3ooHYL6fYBnsJde+dKBgxZYI9OHS4fxnCJC JJGP3yTTYEQN5lMj/hP9qh+akJuVnSzDhnSeBGc2byXoq3xUilxYSOkvoCuDE9jUC9ro hH4flDC2DCkHu+W0/qRAdHrI/XaM3IGdOsvXbhdos8pcrZe1+40uUXhyCwlhVmE/k2Cr Y+Pywvp1YxYhritqRardNQ4LT6JBhKLy7yKXhpMtIurENelmEJ7c3obD4P3NmZfPD5rj +3lKMVU9QadyRZ31FyL8ILa7TuUYN944qPLu+zBnuEOVnk2qNORJKlvgVng10D4utljA GLuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=5xGg5TuF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k26si3046968edq.239.2021.07.08.06.12.56; Thu, 08 Jul 2021 06:13:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=5xGg5TuF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231877AbhGHNOJ (ORCPT + 99 others); Thu, 8 Jul 2021 09:14:09 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:46182 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230080AbhGHNOJ (ORCPT ); Thu, 8 Jul 2021 09:14:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Transfer-Encoding:Content-Disposition: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:From: Sender:Reply-To:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Content-Disposition: In-Reply-To:References; bh=gS8AFk63aQm9ubdaiQKcXkzcytAXfuI8lQWGTpI+e3o=; b=5x Gg5TuF+v9iaN2x1WBOp57Gi40bGBD+dB8fZuDaHEd64j4rzJuK2fBLnrsSRAJc3RtFoOz4GsHU/eL 032iduhfQDa8AkOcTve/LFSczTM57dVmW+PNUTEk/ZA/EBzEUBZjCd4y/gBNpwCvfKS+nw5XtMOWK pthAzVtA9MWLoGs=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1m1ToB-00Cdsh-1w; Thu, 08 Jul 2021 15:11:15 +0200 Date: Thu, 8 Jul 2021 15:11:15 +0200 From: Andrew Lunn To: "Ismail, Mohammad Athari" Cc: Heiner Kallweit , "David S . Miller" , Russell King , Jakub Kicinski , Florian Fainelli , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH net] net: phy: reconfigure PHY WOL in resume if WOL option still enabled Message-ID: References: <20210708004253.6863-1-mohammad.athari.ismail@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Hi Andrew, > > In our platform, the PHY interrupt pin is not connected to Host CPU. So, the CPU couldn`t service the PHY interrupt.? The PHY interrupt pin is connected to a power management controller (PMC) as a HW wake up signal. The PMC itself couldn't act as interrupt controller to service the PHY interrupt. > > During WOL event, the WOL signal is sent to PMC through the PHY interrupt pin to wake up the PMC. Then, the PMC will wake up the Host CPU and the whole system. How is the PMC connected to the host? LPC? At wake up can you ask it why it woke you up? What event it was, power restored, power button press, or WOL? Can the PMC generate interrupts over the LPC? What PMC is it? Is there a datasheet for it? Getting your architecture correct will also solve your S3/S4 problems. Andrew