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From:   Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date:   Sat, 10 Jul 2021 00:53:07 +0800
Message-ID: <CAAOTY_-yi5NP_U-m==ZHeBNC9-6NrjUacKWdmmgVXZjH+sFZKw@mail.gmail.com>
Subject: Re: Re: Re: BUG: MTK DRM/HDMI broken on 5.13 (mt7623/bpi-r2)
To:     Frank Wunderlich <frank-w@public-files.de>
Cc:     chunkuang Hu <chunkuang.hu@kernel.org>,
        Dafna Hirschfeld <dafna.hirschfeld@collabora.com>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Enric Balletbo i Serra <enric.balletbo@collabora.com>,
        David Airlie <airlied@linux.ie>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        dri-devel <dri-devel@lists.freedesktop.org>,
        Thomas Zimmermann <tzimmermann@suse.de>,
        Collabora Kernel ML <kernel@collabora.com>,
        Matthias Brugger <matthias.bgg@gmail.com>
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Hi, Frank:

Frank Wunderlich <frank-w@public-files.de> =E6=96=BC 2021=E5=B9=B47=E6=9C=
=889=E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=887:28=E5=AF=AB=E9=81=93=
=EF=BC=9A
>
> > Gesendet: Freitag, 09. Juli 2021 um 12:38 Uhr
> > Von: "Frank Wunderlich" <frank-w@public-files.de>
> > An: "Enric Balletbo Serra" <eballetbo@gmail.com>
> > Cc: "CK Hu" <ck.hu@mediatek.com>, "Dafna Hirschfeld" <dafna.hirschfeld@=
collabora.com>, "chunkuang Hu" <chunkuang.hu@kernel.org>, "Thomas Zimmerman=
n" <tzimmermann@suse.de>, "David Airlie" <airlied@linux.ie>, "linux-kernel"=
 <linux-kernel@vger.kernel.org>, "Enric Balletbo i Serra" <enric.balletbo@c=
ollabora.com>, "moderated list:ARM/Mediatek SoC support" <linux-mediatek@li=
sts.infradead.org>, "dri-devel" <dri-devel@lists.freedesktop.org>, "Matthia=
s Brugger" <matthias.bgg@gmail.com>, "Collabora Kernel ML" <kernel@collabor=
a.com>
> > Betreff: Aw: Re: Re: BUG: MTK DRM/HDMI broken on 5.13 (mt7623/bpi-r2)
> >
> >
> > > Gesendet: Freitag, 09. Juli 2021 um 12:24 Uhr
> > > Von: "Enric Balletbo Serra" <eballetbo@gmail.com>
> > > If this is the offending commit, could you try if the following patch
> > > fixes the issue for you?
> > >
> > > https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.gi=
t/commit/?h=3Dv5.13-next/fixes&id=3Ddb39994e0bd852c6612a9709e63c09b98b161e0=
0
> > >
> > > If not, and that patch is the offending commit, it probably means tha=
t
> > > the default routing table doesn't work for mt7623. Needs a specific
> > > soc table.
> >
> > Hi Eric,
> >
> > thanks for response, but it does not fix the issue for me. hdmi on mt76=
23 is DPI not DSI. There is already a mt7623 specific routing-table defined=
 (one for DPI/HDMI and one for external=3DDSI/MIPI):
> >
> > https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/mediatek=
/mtk_drm_drv.c#L74
> >
> > maybe it can be included or compared with the "default" route?
> >
> > regards Frank
>
> Hi
>
> i tried to convert the old routing table into the new format
>
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-=
mmsys.c
> index 080660ef11bf..134dae13382f 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -20,6 +20,12 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys=
_driver_data =3D {
>         .num_routes =3D ARRAY_SIZE(mmsys_default_routing_table),
>  };
>
> +static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data =3D {
> +       .clk_driver =3D "clk-mt2701-mm",
> +       .routes =3D mmsys_mt7623_routing_table,
> +       .num_routes =3D ARRAY_SIZE(mmsys_mt7623_routing_table),
> +};
> +
>  static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data =3D {
>         .clk_driver =3D "clk-mt2712-mm",
>         .routes =3D mmsys_default_routing_table,
> @@ -133,6 +139,10 @@ static const struct of_device_id of_match_mtk_mmsys[=
] =3D {
>                 .compatible =3D "mediatek,mt2701-mmsys",
>                 .data =3D &mt2701_mmsys_driver_data,
>         },
> +       {
> +               .compatible =3D "mediatek,mt7623-mmsys",
> +               .data =3D &mt7623_mmsys_driver_data,
> +       },
>         {
>                 .compatible =3D "mediatek,mt2712-mmsys",
>                 .data =3D &mt2712_mmsys_driver_data,
> diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-=
mmsys.h
> index 11388961dded..fd397f68339c 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.h
> +++ b/drivers/soc/mediatek/mtk-mmsys.h
> @@ -214,5 +214,14 @@ static const struct mtk_mmsys_routes mmsys_default_r=
outing_table[] =3D {
>                 DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, UFOE_MOUT_EN_DSI0,
>         }
>  };
> -
> +static const struct mtk_mmsys_routes mmsys_mt7623_routing_table[] =3D {
> +       //HDMI
> +       {
> +               DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
> +               DISP_REG_CONFIG_DISP_OVL_MOUT_EN, OVL_MOUT_EN_RDMA
> +       }, {
> +               DDP_COMPONENT_RDMA0, DDP_COMPONENT_DPI0,
> +               DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN, RDMA0_SOUT_DPI0
> +       }
> +};
>  #endif /* __SOC_MEDIATEK_MTK_MMSYS_H */
> :...skipping...
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-=
mmsys.c
> index 080660ef11bf..134dae13382f 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -20,6 +20,12 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys=
_driver_data =3D {
>         .num_routes =3D ARRAY_SIZE(mmsys_default_routing_table),
>  };
>
> +static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data =3D {
> +       .clk_driver =3D "clk-mt2701-mm",//leave clock as mt7623 is based =
on mt2701
> +       .routes =3D mmsys_mt7623_routing_table,
> +       .num_routes =3D ARRAY_SIZE(mmsys_mt7623_routing_table),
> +};
> +
>  static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data =3D {
>         .clk_driver =3D "clk-mt2712-mm",
>         .routes =3D mmsys_default_routing_table,
> @@ -133,6 +139,10 @@ static const struct of_device_id of_match_mtk_mmsys[=
] =3D {
>                 .compatible =3D "mediatek,mt2701-mmsys",
>                 .data =3D &mt2701_mmsys_driver_data,
>         },
> +       {
> +               .compatible =3D "mediatek,mt7623-mmsys",
> +               .data =3D &mt7623_mmsys_driver_data,
> +       },
>         {
>                 .compatible =3D "mediatek,mt2712-mmsys",
>                 .data =3D &mt2712_mmsys_driver_data,
> diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-=
mmsys.h
> index 11388961dded..fd397f68339c 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.h
> +++ b/drivers/soc/mediatek/mtk-mmsys.h
> @@ -214,5 +214,14 @@ static const struct mtk_mmsys_routes mmsys_default_r=
outing_table[] =3D {
>                 DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, UFOE_MOUT_EN_DSI0,
>         }
>  };
> -
> +static const struct mtk_mmsys_routes mmsys_mt7623_routing_table[] =3D {
> +       //HDMI
> +       {
> +               DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
> +               DISP_REG_CONFIG_DISP_OVL_MOUT_EN, OVL_MOUT_EN_RDMA
> +       }, {
> +               DDP_COMPONENT_RDMA0, DDP_COMPONENT_DPI0,
> +               DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN, RDMA0_SOUT_DPI0
> +       }
> +};
>
> here i've left out COLOR0 and BLS because i have not found the 3rd (addre=
ss) and 4th params (value) for the routing between them and edging componen=
ts
>
> this is the old route:
>
>         DDP_COMPONENT_OVL0,
>         DDP_COMPONENT_RDMA0,
>         DDP_COMPONENT_COLOR0,
>         DDP_COMPONENT_BLS,
>         DDP_COMPONENT_DPI0,
>
> so i guess i need:
>
> DISP_REG_CONFIG_DISP_RDMA0_MOUT_EN, RDMA0_MOUT_EN_COLOR0
> DISP_REG_CONFIG_DISP_COLOR0_MOUT_EN, COLOR0_MOUT_EN_BLS
> DISP_REG_CONFIG_DISP_BLS_MOUT_EN, BLS_MOUT_EN_DPI0
>
> thinking OUT is right for display...it's no HDMI-in
> but i'm unsure whats the difference between MOUT and SOUT
>
> compatible for mmsys is already set to mediatek,mt7623-mmsys in arch/arm/=
boot/dts/mt7623n.dtsi but it's not working, i guess because color0 and bls =
are missing in route
>
> any hint how to add them?

SOUT means even though data could output to multiple sink, but could
only output to single sink at one moment. MOUT means data could output
to multiple sink at one moment.
For SOUT with 4 sink output, the value for each sink would be 0, 1, 2, 3.
For MOUT with 4 sink output, the value for each sink would be BIT(0),
BIT(1), BIT(2), BIT(3).
[1] is my original design, and it has 'mask' in struct mtk_mmsys_conn_cfg.
For SOUT with 4 sink output, the mask would be 0x3.
For MOUT with 4 sink output, the mask would be 0xf.
You could try to add back the mask.

[1] https://chromium-review.googlesource.com/c/chromiumos/third_party/kerne=
l/+/2345186

Regards,
Chun-Kuang.

>
> regards Frank