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Mon, 12 Jul 2021 19:13:39 +0000 From: Sunil Muthuswamy To: Michael Kelley , KY Srinivasan , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui CC: "linux-hyperv@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas Subject: RE: [PATCH 1/1] PCI: hv: Support for create interrupt v3 Thread-Topic: [PATCH 1/1] PCI: hv: Support for create interrupt v3 Thread-Index: Add0TIVdcQX5pMV/TWWUfz5smDdQ7ADAscqQAACY6qA= Date: Mon, 12 Jul 2021 19:13:39 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=0427ad34-30ce-4617-8641-271adbc45791;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2021-07-12T18:54:10Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MW4PR21MB2002.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 669d24f9-f03e-4773-457c-08d9456927e6 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Jul 2021 19:13:39.1198 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: loXdcS4wmWP7lHYjZiAsMaN8P7CkC9m6rXV2tU16y68qENGCFEX8q3DaHoe0qTaOIJoOhsajqWlNjbzf2fhjy6XZ4453TXogBliEW1QGWqw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR21MB0173 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > --- a/drivers/pci/controller/pci-hyperv.c > > +++ b/drivers/pci/controller/pci-hyperv.c > > @@ -64,6 +64,7 @@ enum pci_protocol_version_t { > > PCI_PROTOCOL_VERSION_1_1 =3D PCI_MAKE_VERSION(1, 1), /* Win10 */ > > PCI_PROTOCOL_VERSION_1_2 =3D PCI_MAKE_VERSION(1, 2), /* RS1 */ > > PCI_PROTOCOL_VERSION_1_3 =3D PCI_MAKE_VERSION(1, 3), /* Vibranium */ > > + PCI_PROTOCOL_VERSION_1_4 =3D PCI_MAKE_VERSION(1, 4), /* Fe */ >=20 > It would be better if we can avoid annotating with internal code names. > Inside of MSFT we tend to forget over time, and people outside usually > have no idea what they mean. >=20 Would you like me to just delete the 'Fe' comment or the previous ones as w= ell? > > @@ -235,6 +239,21 @@ struct hv_msi_desc2 { > > u16 processor_array[32]; > > } __packed; > > > > +/* > > + * struct hv_msi_desc3 - 1.3 version of hv_msi_desc > > + * Everything is the same as in 'hv_msi_desc2' except that the size > > + * of the 'vector_count' field is larger to support bigger vector >=20 > Actually, it's the "vector" field that's bigger, not "vector_count". Will update the comment, thanks. >=20 > > + * values. For ex: LPI vectors on ARM. > > + */ > > +struct hv_msi_desc3 { > > + u32 vector; > > + u8 delivery_mode; > > + u8 reserved; > > + u16 vector_count; > > + u16 processor_count; > > + u16 processor_array[32]; > > +} __packed; > > + > > /** > > * struct tran_int_desc > > * @reserved: unused, padding > > @@ -383,6 +402,12 @@ struct pci_create_interrupt2 { > > struct hv_msi_desc2 int_desc; > > } __packed; > > > > +struct pci_create_interrupt3 { > > + struct pci_message message_type; > > + union win_slot_encoding wslot; > > + struct hv_msi_desc3 int_desc; > > +} __packed; > > + > > struct pci_delete_interrupt { > > struct pci_message message_type; > > union win_slot_encoding wslot; > > @@ -1334,26 +1359,55 @@ static u32 hv_compose_msi_req_v1( > > return sizeof(*int_pkt); > > } > > > > +static void hv_compose_msi_req_get_cpu(struct cpumask *affinity, int *= cpu, > > + u16 *count) > > +{ > > + /* > > + * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten > > + * by subsequent retarget in hv_irq_unmask(). > > + */ > > + *cpu =3D cpumask_first_and(affinity, cpu_online_mask); > > + *count =3D 1; > > +} > > + > > static u32 hv_compose_msi_req_v2( > > struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity, > > u32 slot, u8 vector) > > { > > int cpu; > > + u16 cpu_count; > > > > int_pkt->message_type.type =3D PCI_CREATE_INTERRUPT_MESSAGE2; > > int_pkt->wslot.slot =3D slot; > > int_pkt->int_desc.vector =3D vector; > > int_pkt->int_desc.vector_count =3D 1; > > int_pkt->int_desc.delivery_mode =3D APIC_DELIVERY_MODE_FIXED; > > - > > - /* > > - * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten > > - * by subsequent retarget in hv_irq_unmask(). > > - */ > > cpu =3D cpumask_first_and(affinity, cpu_online_mask); >=20 > Shouldn't this line be deleted since the new hv_compose_msi_req_get_cpu() > function is doing the work? Yes, this is fixed in v2 that I just sent out.