Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp3247767pxv; Mon, 12 Jul 2021 12:48:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwx8c1hWv/v860n0lnwu7nb4uyafl52HC9NApY5PGgnhco3OcgzwEHibue2Vx5CrERCRdTT X-Received: by 2002:a05:6402:51c9:: with SMTP id r9mr622186edd.326.1626119293711; Mon, 12 Jul 2021 12:48:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626119293; cv=none; d=google.com; s=arc-20160816; b=UsifFT3SrlZJB0hreiocnySQUZ4XLZBtA8Di05FEkSa9TZLC8ULmgKKAD+ONGqh8lL l4zSBUI9UdD3sSjL7f9ESsmTFhKT8Mpv40Vrg8wVe8TyewNANeDNrbAQuH7rPHysV+ef 3yOC9keI7wOEwpNniGneklmyrLVPKD3hDo+KbPfAuYB5JD63zabIcAwV2TkMQhznHG17 dwQeOs6sXhRLex8MVlpA8LwuwTl/NX0hAdwsEIu1BSBUe50xhJ24RDH9Uj/K0/qGQGdV 9sjhrK5MCvzLH41bEZYF9Xd+WZonDAEl0I8sC7yGnnsvXR9kAUSbCCPgV01aaR+Jc+hs lS6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=76SpB4N9OddCGvuBb+xS3mddxIUgqeWIS2dpoq3Aq1s=; b=jVuhnctp/UHQ+kkWF2DAxcbF0V4H/E/bfTHMti8JzBaJ0nPGpWdbuutangOZk9N4R6 4s7mJa/8tPZ1YIbMjaAqZV52K/8T7SpFBPIXx2G+oAG+pt8WI0rsdIBCk2xUfXITSkqz YBbm+sa0ozx6Dh8Hxy07U0I9qDe9u1Hu7iJkUFfO0JeyFH69i1q+8fhvW47Ve3vY6fof KG9Hkzxx68Jgp2qQGBkI0L/ljtTlxG+NsrzIFhrmqPuwcVCTZCOefDzL7nMQF/F30KjS 1VSoFTEoInkWdd0Ptq1MAh6uSgxaUMQdQM0teuR/mN/ct3nkYy6gvdFDYk+JdsMcGjT+ +ENA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f14si17114926ejj.667.2021.07.12.12.47.50; Mon, 12 Jul 2021 12:48:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236532AbhGLTri (ORCPT + 99 others); Mon, 12 Jul 2021 15:47:38 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:53010 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S236509AbhGLTrg (ORCPT ); Mon, 12 Jul 2021 15:47:36 -0400 X-IronPort-AV: E=Sophos;i="5.84,234,1620658800"; d="scan'208";a="87419169" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 13 Jul 2021 04:44:47 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 2AE6840E0116; Tue, 13 Jul 2021 04:44:43 +0900 (JST) From: Lad Prabhakar To: Geert Uytterhoeven , Rob Herring , Linus Walleij , Magnus Damm , Michael Turquette , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH v2 4/5] arm64: dts: renesas: r9a07g044: Add pinctrl node Date: Mon, 12 Jul 2021 20:44:21 +0100 Message-Id: <20210712194422.12405-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210712194422.12405-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20210712194422.12405-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add GPIO/pinctrl node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 9a7489dc70d1..22fa8dea0805 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -191,6 +191,19 @@ status = "disabled"; }; + pinctrl: pin-controller@11030000 { + compatible = "renesas,r9a07g044-pinctrl"; + reg = <0 0x11030000 0 0x10000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 392>; + clocks = <&cpg CPG_MOD R9A07G044_GPIO_HCLK>; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_GPIO_RSTN>, + <&cpg R9A07G044_GPIO_PORT_RESETN>, + <&cpg R9A07G044_GPIO_SPARE_RESETN>; + }; + gic: interrupt-controller@11900000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; -- 2.17.1