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From:   "Sanil, Shruthi" <shruthi.sanil@intel.com>
To:     "daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
CC:     "andriy.shevchenko@linux.intel.com" 
        <andriy.shevchenko@linux.intel.com>,
        "kris.pan@linux.intel.com" <kris.pan@linux.intel.com>,
        "mgross@linux.intel.com" <mgross@linux.intel.com>,
        "Thokala, Srikanth" <srikanth.thokala@intel.com>,
        "Raja Subramanian, Lakshmi Bai" 
        <lakshmi.bai.raja.subramanian@intel.com>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@intel.com>
Subject: RE: [PATCH v4 0/2] Add the driver for Intel Keem Bay SoC timer block
Thread-Topic: [PATCH v4 0/2] Add the driver for Intel Keem Bay SoC timer block
Thread-Index: AQHXa+TYX4Bi7dy+BEiiludNzO07FKtAcfQA
Date:   Tue, 13 Jul 2021 05:08:52 +0000
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References: <20210628061410.8009-1-shruthi.sanil@intel.com>
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Gentle Reminder!

Regards,
Shruthi

> -----Original Message-----
> From: Sanil, Shruthi <shruthi.sanil@intel.com>
> Sent: Monday, June 28, 2021 11:44 AM
> To: daniel.lezcano@linaro.org; tglx@linutronix.de; robh+dt@kernel.org;
> linux-kernel@vger.kernel.org; devicetree@vger.kernel.org
> Cc: andriy.shevchenko@linux.intel.com; kris.pan@linux.intel.com;
> mgross@linux.intel.com; Thokala, Srikanth <srikanth.thokala@intel.com>;
> Raja Subramanian, Lakshmi Bai <lakshmi.bai.raja.subramanian@intel.com>;
> Sangannavar, Mallikarjunappa <mallikarjunappa.sangannavar@intel.com>;
> Sanil, Shruthi <shruthi.sanil@intel.com>
> Subject: [PATCH v4 0/2] Add the driver for Intel Keem Bay SoC timer block
>=20
> From: Shruthi Sanil <shruthi.sanil@intel.com>
>=20
> The timer block supports 1 64-bit free running counter and 8 32-bit gener=
al
> purpose timers.
>=20
> Patch 1 holds the device tree binding documentation.
> Patch 2 holds the device driver.
>=20
> This driver is tested on the Keem Bay evaluation module board.
>=20
> Changes since v3:
> - Update in KConfig file to support COMPILE_TEST for Keem Bay timer.
> - Update in device tree bindings to remove status field.
> - Update in device tree bindings to remove 64-bit address space for
>   the child nodes by using non-empty ranges.
>=20
> Changes since v2:
> - Add multi timer support.
> - Update in the device tree binding to support multi timers.
> - Code optimization.
>=20
> Changes since v1:
> - Add support for KEEMBAY_TIMER to get selected through
> Kconfig.platforms.
> - Add CLOCK_EVT_FEAT_DYNIRQ as part of clockevent feature.
> - Avoid overlapping reg regions across 2 device nodes.
> - Simplify 2 device nodes as 1 because both are from same IP block.
> - Adapt the driver code according to the new simplified devicetree.
>=20
> Shruthi Sanil (2):
>   dt-bindings: timer: Add bindings for Intel Keem Bay SoC Timer
>   clocksource: Add Intel Keem Bay timer support
>=20
>  .../bindings/timer/intel,keembay-timer.yaml   | 170 ++++++++++++
>  MAINTAINERS                                   |   5 +
>  drivers/clocksource/Kconfig                   |  11 +
>  drivers/clocksource/Makefile                  |   1 +
>  drivers/clocksource/timer-keembay.c           | 255 ++++++++++++++++++
>  5 files changed, 442 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/timer/intel,keembay-timer.yaml
>  create mode 100644 drivers/clocksource/timer-keembay.c
>=20
>=20
> base-commit: 62fb9874f5da54fdb243003b386128037319b219
> --
> 2.17.1