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mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=298wsyePyTswRo1CYoBZa7dKKYkFTI/PXewir46n6mc=; b=LXaH+djb2fFgjD2YGm3TSt4fj0C5+NRYqycsp0fPF3XQAIKxDbHbq8le9U66rP8ZEK3itqGvvKWKEUJY7HU7PL+42u+D0hu2SYxA+PFjivLW3VSHqqiez8QyGAfzJRNcN5wlTXw9wcFFzmY+NI64HfpCQzcXCvyj21eCSNzWHq8= Received: from VE1PR04MB6688.eurprd04.prod.outlook.com (2603:10a6:803:127::25) by VI1PR0402MB2781.eurprd04.prod.outlook.com (2603:10a6:800:ad::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4308.23; Tue, 13 Jul 2021 09:12:36 +0000 Received: from VE1PR04MB6688.eurprd04.prod.outlook.com ([fe80::a978:6f38:2bce:9076]) by VE1PR04MB6688.eurprd04.prod.outlook.com ([fe80::a978:6f38:2bce:9076%5]) with mapi id 15.20.4308.027; Tue, 13 Jul 2021 09:12:36 +0000 From: Robin Gong To: Lucas Stach , "vkoul@kernel.org" , "mark.rutland@arm.com" , "broonie@kernel.org" , "robh+dt@kernel.org" , "catalin.marinas@arm.com" , "will.deacon@arm.com" , "shawnguo@kernel.org" , "festevam@gmail.com" , "s.hauer@pengutronix.de" , "martin.fuzzey@flowbird.group" , "u.kleine-koenig@pengutronix.de" , "dan.j.williams@intel.com" , "matthias.schiffer@ew.tq-group.com" , "frieder.schrempf@kontron.de" , "m.felsch@pengutronix.de" , Clark Wang CC: "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-spi@vger.kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , "dmaengine@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: RE: [PATCH v14 08/12] spi: imx: remove ERR009165 workaround on i.mx6ul Thread-Topic: [PATCH v14 08/12] spi: imx: remove ERR009165 workaround on i.mx6ul Thread-Index: AQHXK33qCfWwNw4/xUOO1TZAKTLOhKs69jqAgAROBnCAAGYBAIAAAl1w Date: Tue, 13 Jul 2021 09:12:35 +0000 Message-ID: References: <1617809456-17693-1-git-send-email-yibin.gong@nxp.com> <1617809456-17693-9-git-send-email-yibin.gong@nxp.com> <7ca4554c58908618705768e01239409d19f83d17.camel@pengutronix.de> In-Reply-To: <7ca4554c58908618705768e01239409d19f83d17.camel@pengutronix.de> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: pengutronix.de; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VE1PR04MB6688.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6ceac95d-f94d-483e-74c6-08d945de5afc X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Jul 2021 09:12:35.9657 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: GwaqhK+HbLKoBdQrZEruijOnBqPvj2IZmBtSdxGHQRIm5lKylZw0kn0qkD54WSkBh7bMoXMJkc39uIWgcSxfZQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2781 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/07/21 17:31 Lucas Stach wrote:=20 > Am Montag, dem 12.07.2021 um 03:48 +0000 schrieb Robin Gong: > > On 09/07/21 17:42 Lucas Stach wrote: > > > Am Mittwoch, dem 07.04.2021 um 23:30 +0800 schrieb Robin Gong: > > > > ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and > > > > i.mx8m/8mm still need this errata. Please refer to nxp official > > > > errata document from > > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fw= w > > > w.n > xp.com%2F&data=3D04%7C01%7Cyibin.gong%40nxp.com%7C48156bc93d > > > > c84ac26e9d08d942bdc0ac%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0% > > > > 7C1%7C637614205017900475%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 > > > > wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&a > > > > mp;sdata=3DkeYQubzt1jWrKhaxXr40RL41vzFuIn7x1Sasa3p%2F9Xo%3D&res > > > erved=3D0 . > > > > > > > > For removing workaround on those chips. Add new i.mx6ul type. > > > > > > > > Signed-off-by: Robin Gong > > > > Acked-by: Mark Brown > > > > --- > > > > drivers/spi/spi-imx.c | 47 > > > > +++++++++++++++++++++++++++++++++++++++++++---- > > > > 1 file changed, 43 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index > > > > cf235b9..d18ee25 100644 > > > > --- a/drivers/spi/spi-imx.c > > > > +++ b/drivers/spi/spi-imx.c > > > > @@ -59,6 +59,7 @@ enum spi_imx_devtype { > > > > IMX35_CSPI, /* CSPI on all i.mx except above */ > > > > IMX51_ECSPI, /* ECSPI on i.mx51 */ > > > > IMX53_ECSPI, /* ECSPI on i.mx53 and later */ > > > > + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ > > > > > > This patch could be a lot smaller if you didn't introduce a new > > > devtype. You could just use the IMX51_ECSPI in > > > imx6ul_ecspi_devtype_data, as all you care about as a relevant > > > difference is the tx_glitch_fixed property, which isn't tied to the d= evtype. > > I knew tx_glitch_fixed was enough but I still prefer to add new > > 'IMX6UL_ECSPI' because we can clearly choose the right IP which has > > fix the issue while legacy IMX51 if it's not fixed by dts. > > > Sorry, I don't follow this reasoning. You are not using the new IMX6UL_EC= SPI > devtype in any way in this patch, other than a single location, where you= just > handle it the same as the IMX51_ECSPI devtype. Okay, will reuse IMX51_ECSPI as devtype, but will still keep "fsl,imx6ul-ec= spi". >=20 > > > > > > > > }; > > > > > > > > struct spi_imx_data; > > > > @@ -78,6 +79,11 @@ struct spi_imx_devtype_data { > > > > bool has_slavemode; > > > > unsigned int fifo_size; > > > > bool dynamic_burst; > > > > + /* > > > > + * ERR009165 fixed or not: > > > > + * > > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fw= w > > > w.n > xp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=3D04%7C01%7C > > > > yibin.gong%40nxp.com%7C48156bc93dc84ac26e9d08d942bdc0ac%7C686ea > > > > 1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637614205017900475%7CU > > > > nknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6 > > > > Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=3DJ9iZb93uN1VEriN%2F2GAE > > > TWxdv4n%2FD6ZXteMCFkB8KHM%3D&reserved=3D0 > > > > + */ > > > > + bool tx_glitch_fixed; > > > > enum spi_imx_devtype devtype; > > > > }; > > > > > > > > @@ -134,6 +140,11 @@ static inline int is_imx51_ecspi(struct > > > > spi_imx_data > > > *d) > > > > return d->devtype_data->devtype =3D=3D IMX51_ECSPI; } > > > > > > > > +static inline int is_imx6ul_ecspi(struct spi_imx_data *d) { > > > > + return d->devtype_data->devtype =3D=3D IMX6UL_ECSPI; } > > > > + > > > > static inline int is_imx53_ecspi(struct spi_imx_data *d) { > > > > return d->devtype_data->devtype =3D=3D IMX53_ECSPI; @@ -593,8 > > > > +604,14 > > > @@ > > > > static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx= , > > > > ctrl |=3D mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); > > > > spi_imx->spi_bus_clk =3D clk; > > > > > > > > - /* ERR009165: work in XHC mode as PIO */ > > > > - ctrl &=3D ~MX51_ECSPI_CTRL_SMC; > > > > + /* > > > > + * ERR009165: work in XHC mode instead of SMC as PIO on the > chips > > > > + * before i.mx6ul. > > > > + */ > > > > + if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) > > > > + ctrl |=3D MX51_ECSPI_CTRL_SMC; > > > > + else > > > > + ctrl &=3D ~MX51_ECSPI_CTRL_SMC; > > > > > > > > writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); > > > > > > > > @@ -620,12 +637,16 @@ static int > > > > mx51_ecspi_prepare_transfer(struct > > > > spi_imx_data *spi_imx, > > > > > > > > static void mx51_setup_wml(struct spi_imx_data *spi_imx) { > > > > + u32 tx_wml =3D 0; > > > > + > > > > + if (spi_imx->devtype_data->tx_glitch_fixed) > > > > + tx_wml =3D spi_imx->wml; > > > > /* > > > > * Configure the DMA register: setup the watermark > > > > * and enable DMA request. > > > > */ > > > > writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | > > > > - MX51_ECSPI_DMA_TX_WML(0) | > > > > + MX51_ECSPI_DMA_TX_WML(tx_wml) | > > > > MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | > > > > MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN | > > > > MX51_ECSPI_DMA_RXTDEN, spi_imx->base + > MX51_ECSPI_DMA); > > > @@ -1019,6 > > > > +1040,23 @@ static struct spi_imx_devtype_data > > > imx53_ecspi_devtype_data =3D { > > > > .devtype =3D IMX53_ECSPI, > > > > }; > > > > > > > > +static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data =3D { > > > > + .intctrl =3D mx51_ecspi_intctrl, > > > > + .prepare_message =3D mx51_ecspi_prepare_message, > > > > + .prepare_transfer =3D mx51_ecspi_prepare_transfer, > > > > + .trigger =3D mx51_ecspi_trigger, > > > > + .rx_available =3D mx51_ecspi_rx_available, > > > > + .reset =3D mx51_ecspi_reset, > > > > + .setup_wml =3D mx51_setup_wml, > > > > + .fifo_size =3D 64, > > > > + .has_dmamode =3D true, > > > > + .dynamic_burst =3D true, > > > > + .has_slavemode =3D true, > > > > + .tx_glitch_fixed =3D true, > > > > + .disable =3D mx51_ecspi_disable, > > > > + .devtype =3D IMX6UL_ECSPI, > > > > +}; > > > > + > > > > static const struct of_device_id spi_imx_dt_ids[] =3D { > > > > { .compatible =3D "fsl,imx1-cspi", .data =3D &imx1_cspi_devtype_d= ata, }, > > > > { .compatible =3D "fsl,imx21-cspi", .data =3D > > > > &imx21_cspi_devtype_data, }, @@ -1027,6 +1065,7 @@ static const > > > > struct of_device_id spi_imx_dt_ids[] > > > =3D { > > > > { .compatible =3D "fsl,imx35-cspi", .data =3D > &imx35_cspi_devtype_data, }, > > > > { .compatible =3D "fsl,imx51-ecspi", .data =3D > &imx51_ecspi_devtype_data, }, > > > > { .compatible =3D "fsl,imx53-ecspi", .data =3D > > > > &imx53_ecspi_devtype_data, }, > > > > + { .compatible =3D "fsl,imx6ul-ecspi", .data =3D > > > > +&imx6ul_ecspi_devtype_data, }, > > > > { /* sentinel */ } > > > > }; > > > > MODULE_DEVICE_TABLE(of, spi_imx_dt_ids); @@ -1604,7 +1643,7 > @@ > > > static > > > > int spi_imx_probe(struct platform_device *pdev) > > > > spi_imx->bitbang.master->mode_bits =3D SPI_CPOL | SPI_CPHA | > > > SPI_CS_HIGH \ > > > > | SPI_NO_CS; > > > > if (is_imx35_cspi(spi_imx) || is_imx51_ecspi(spi_imx) || > > > > - is_imx53_ecspi(spi_imx)) > > > > + is_imx53_ecspi(spi_imx) || is_imx6ul_ecspi(spi_imx)) > > > > spi_imx->bitbang.master->mode_bits |=3D SPI_LOOP | > SPI_READY; > > > > > > > > spi_imx->spi_drctl =3D spi_drctl; > > > > > >=20