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Subject: Re: [PATCH] arm64: tegra: Enable SMMU support for PCIe on Tegra194
To:     Vidya Sagar <vidyas@nvidia.com>, <robh+dt@kernel.org>,
        <thierry.reding@gmail.com>
CC:     <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <kthota@nvidia.com>,
        <mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
References: <20210713044414.25536-1-vidyas@nvidia.com>
From:   Jon Hunter <jonathanh@nvidia.com>
Message-ID: <3fb8cabd-901b-d968-33da-cd163fe305dc@nvidia.com>
Date:   Tue, 13 Jul 2021 10:55:54 +0100
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On 13/07/2021 05:44, Vidya Sagar wrote:
> As of commit c7289b1c8a4e ("arm64: tegra: Enable SMMU support on
> Tegra194"), SMMU support is enabled system-wide on Tegra194. However,
> there was a bit of overlap between the SMMU enablement and the PCIe
> support addition, so the PCIe device tree nodes are missing the iommus
> and interconnects properties. This in turn leads to SMMU faults for
> these devices, since by default the ARM SMMU will fault.
> 
> Add the iommus and interconnects properties to all the PCIe device
> tree nodes to restore their functionality.
> 
> Fixes: c7289b1c8a4e ("arm64: tegra: Enable SMMU support on Tegra194")
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
>  arch/arm64/boot/dts/nvidia/tegra194.dtsi | 60 +++++++++++++++++++++---
>  1 file changed, 54 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index 076d5efc4c3d..b55522aacfb0 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -1840,7 +1840,11 @@
>  
>  		interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE1R &emc>,
>  				<&mc TEGRA194_MEMORY_CLIENT_PCIE1W &emc>;
> -		interconnect-names = "read", "write";
> +		interconnect-names = "dma-mem", "dma-mem";


Thierry indicated that the convention we have been using is that only
the entry is called 'dma-mem'. So could be good to update this to be
consistent with the other interconnect-names entries. Otherwise ...

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
nvpublic