Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
MIME-Version: 1.0
References: <20210712194422.12405-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
 <20210712194422.12405-6-prabhakar.mahadev-lad.rj@bp.renesas.com> <53e6c8fa-311f-f100-dd06-d806ab593488@gmail.com>
In-Reply-To: <53e6c8fa-311f-f100-dd06-d806ab593488@gmail.com>
From:   "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date:   Tue, 13 Jul 2021 15:34:26 +0100
Message-ID: <CA+V-a8uB-QmtYjBQ7sondsfeQvBOMhmsYPd=0R4TrxzvO=zs6w@mail.gmail.com>
Subject: Re: [PATCH v2 5/5] arm64: dts: renesas: rzg2l-smarc: Add scif0 pins
To:     Sergei Shtylyov <sergei.shtylyov@gmail.com>
Cc:     Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Rob Herring <robh+dt@kernel.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        Magnus Damm <magnus.damm@gmail.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        linux-clk <linux-clk@vger.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        Biju Das <biju.das.jz@bp.renesas.com>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

Hi Sergei,

Thank you for the review.

On Tue, Jul 13, 2021 at 12:18 PM Sergei Shtylyov
<sergei.shtylyov@gmail.com> wrote:
>
> On 12.07.2021 22:44, Lad Prabhakar wrote:
>
> > Add scif0 pins in pinctrl node and update the scif0 node
> > to include pinctrl property.
>
>     Properties? There are a couple... :-)
>
Agreed will update the commit message.

Cheers,
Prabhakar

> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> >   arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 10 ++++++++++
> >   1 file changed, 10 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > index adcd4f50519e..0987163f25ee 100644
> > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> [...]
> >       clock-frequency = <24000000>;
> >   };
> >
> > +&pinctrl {
> > +     scif0_pins: scif0 {
> > +             pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
> > +                      <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
> > +     };
> > +};
> > +
> >   &scif0 {
> > +     pinctrl-0 = <&scif0_pins>;
> > +     pinctrl-names = "default";
> >       status = "okay";
> >   };
> >
>
> MBR, Sergei