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[23.128.96.18]) by mx.google.com with ESMTP id e1si9957102edm.222.2021.07.13.09.36.16; Tue, 13 Jul 2021 09:36:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=K15tC7HD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234947AbhGMQhL (ORCPT + 99 others); Tue, 13 Jul 2021 12:37:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234290AbhGMQg6 (ORCPT ); Tue, 13 Jul 2021 12:36:58 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 688F0C0613AC for ; Tue, 13 Jul 2021 09:34:03 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id h1-20020a255f410000b02905585436b530so27736987ybm.21 for ; Tue, 13 Jul 2021 09:34:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=reply-to:date:in-reply-to:message-id:mime-version:references :subject:from:to:cc; bh=BciuiwGJwso95cAjqjPQ+Wf7zIf6IuqrurDTOWbsptw=; b=K15tC7HDPTNvLb3YFMilynTbQJZ6O0e2OQH/a9z/1hQKLTNoG4NeQ1JhiahFrS7kqQ cBKoQgJwCMjP48NwpdespWi4BNVtl4/sj2FokKy/Ep3QkGdmMRT7m1ypoPBjdKPPqZdc 2vhzrKqdFd4eTeWm7AItGiRY2rbZc8OC5Umv0R1jqhKwLK7eamLdU7iIE6mdeoK8giH6 L8J8kU0ZUJMyVMRvCNYPIgmywqZELvjwtMv3fIt+8PCbentMMgdAE2ZA5sApIleNszOR HsCSv9K6CaDTY6mYi9faILfSIlI+iEmAvOChhkP8Hns3uvzYENdZagiGPI4hggmTS/ly bKkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:reply-to:date:in-reply-to:message-id :mime-version:references:subject:from:to:cc; bh=BciuiwGJwso95cAjqjPQ+Wf7zIf6IuqrurDTOWbsptw=; b=S8QG8FlZUbLERW7dfhUdD2eXxrP3JNlh+fFF3cy0ktgz6Ispf2s+zURtE0pnQRpHBH kJo5f1AYgKdiyjE59fdoPXjvnvNsK4gnCgQ/eLhCiwBUiSO9DtSqcxUFIr8N4YgSiXv3 SEv8HTW07WZlvQAinboNqrUJTIuBfSD/oFPB9gvPPKl+Z7e6jvnrGP/eTaEGzcVWMSTf HjF4BqIlDFzbUbBY4UaaIBCzVJps9E6sI6k+PEbvkOLrbEXUn1LuzaR140VxaOWvCukH znGDiuUUs244S/0a47HSpfYg8TZJJ+is9qpXxnW6tyFBNb51Ck7kj/IyiyMYLtC2LJ3K Jxjw== X-Gm-Message-State: AOAM530oeHlGxlvN1yAMVtewwSPKSHKZ0xH/zfn7D8NpBDWwyHqOZ17d +gXPyqgYONtoli0ptYkMvojGjYUxzX0= X-Received: from seanjc798194.pdx.corp.google.com ([2620:15c:90:200:825e:11a1:364b:8109]) (user=seanjc job=sendgmr) by 2002:a25:6c6:: with SMTP id 189mr6740215ybg.33.1626194042605; Tue, 13 Jul 2021 09:34:02 -0700 (PDT) Reply-To: Sean Christopherson Date: Tue, 13 Jul 2021 09:32:53 -0700 In-Reply-To: <20210713163324.627647-1-seanjc@google.com> Message-Id: <20210713163324.627647-16-seanjc@google.com> Mime-Version: 1.0 References: <20210713163324.627647-1-seanjc@google.com> X-Mailer: git-send-email 2.32.0.93.g670b81a890-goog Subject: [PATCH v2 15/46] KVM: x86: Set BSP bit in reset BSP vCPU's APIC base by default From: Sean Christopherson To: Paolo Bonzini Cc: Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Reiji Watanabe Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Set the BSP bit appropriately during local APIC "reset" instead of relying on vendor code to clean up at a later point. This is a step towards consolidating the local APIC, VMX, and SVM xAPIC initialization code. Reviewed-by: Reiji Watanabe Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index acb201d16b5e..0fb282b64c8f 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2321,6 +2321,7 @@ EXPORT_SYMBOL_GPL(kvm_apic_update_apicv); void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) { struct kvm_lapic *apic = vcpu->arch.apic; + u64 msr_val; int i; if (!apic) @@ -2330,8 +2331,10 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) hrtimer_cancel(&apic->lapic_timer.timer); if (!init_event) { - kvm_lapic_set_base(vcpu, APIC_DEFAULT_PHYS_BASE | - MSR_IA32_APICBASE_ENABLE); + msr_val = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE; + if (kvm_vcpu_is_reset_bsp(vcpu)) + msr_val |= MSR_IA32_APICBASE_BSP; + kvm_lapic_set_base(vcpu, msr_val); kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); } kvm_apic_set_version(apic->vcpu); -- 2.32.0.93.g670b81a890-goog