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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id gd20sm50816pjb.33.2021.07.13.13.51.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jul 2021 13:51:46 -0700 (PDT) Date: Tue, 13 Jul 2021 20:51:43 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: isaku.yamahata@intel.com, Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , erdemaktas@google.com, Connor Kuehl , x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, isaku.yamahata@gmail.com, Sean Christopherson Subject: Re: [RFC PATCH v2 38/69] KVM: x86: Add option to force LAPIC expiration wait Message-ID: References: <357378fcb6e3e2becb6d4f00a5c3d2b00b2c566b.1625186503.git.isaku.yamahata@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 06, 2021, Paolo Bonzini wrote: > On 03/07/21 00:04, isaku.yamahata@intel.com wrote: > > From: Sean Christopherson > > > > Add an option to skip the IRR check in kvm_wait_lapic_expire(). This > > will be used by TDX to wait if there is an outstanding notification for > > a TD, i.e. a virtual interrupt is being triggered via posted interrupt > > processing. KVM TDX doesn't emulate PI processing, i.e. there will > > never be a bit set in IRR/ISR, so the default behavior for APICv of > > querying the IRR doesn't work as intended. > > > > Signed-off-by: Sean Christopherson > > Signed-off-by: Isaku Yamahata > > Is there a better (existing after the previous patches) flag to test, or > possibly can it use vm_type following the suggestion I gave for patch 28? Not sure if there's a "better" flag, but there's most definitely a flag somewhere that will suffice :-)