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From:   Xiongfeng Wang <wangxiongfeng2@huawei.com>
To:     <sudeep.holla@arm.com>, <james.morse@arm.com>,
        <gregkh@linuxfoundation.org>, <rafael@kernel.org>
CC:     <linux-kernel@vger.kernel.org>, <bobo.shaobowang@huawei.com>,
        <wangxiongfeng2@huawei.com>
Subject: [PATCH v2] cacheinfo: clear cache_leaves(cpu) in free_cache_attributes()
Date:   Wed, 14 Jul 2021 09:32:55 +0800
Message-ID: <1626226375-58730-1-git-send-email-wangxiongfeng2@huawei.com>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

On ARM64, when PPTT(Processor Properties Topology Table) is not
implemented in ACPI boot, we will goto 'free_ci' with the following
print:
  Unable to detect cache hierarchy for CPU 0

But some other codes may still use 'num_leaves' to iterate through the
'info_list', such as get_cpu_cacheinfo_id(). If 'info_list' is NULL , it
would crash. So clear 'num_leaves' in free_cache_attributes().

Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
---
v1 -> v2: Drop the Fixes tag as it doesn't fix anything in upstream.
---
 drivers/base/cacheinfo.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index bfc0959..dad2962 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -297,6 +297,7 @@ static void free_cache_attributes(unsigned int cpu)
 
 	kfree(per_cpu_cacheinfo(cpu));
 	per_cpu_cacheinfo(cpu) = NULL;
+	cache_leaves(cpu) = 0;
 }
 
 int __weak init_cache_level(unsigned int cpu)
-- 
1.7.12.4