Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp251093pxv; Wed, 14 Jul 2021 03:12:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz+Esz9aU9XSHYZdhV9iqAtH+DNOd5CXIHnxU357RsstHQF1OC7QrrT9szYAehNMKdX7KXW X-Received: by 2002:a05:6638:289:: with SMTP id c9mr8350612jaq.14.1626257561600; Wed, 14 Jul 2021 03:12:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626257561; cv=none; d=google.com; s=arc-20160816; b=a8wGurvPQ7jVpJcSpis3dZJBguF4E0ZuGrIWzq3atsbpyirUMsI1tHMPUYQLZ1AvA7 xTYllaYHo58PLuNNlrLw5JiOyOL7W26Pjz2krZgG7Yn9qCz26xziawx6lEYY0d0MlZWg C+Q9tTdWjQmCQZrpw+Vse3GzNizHOYnzb5YetC/GjF9yC6I7WuY+tMDjyvsHvANim8B9 DJ46+IH0nhdDp4/N0iE8/vgjQ3f/xgJPWCsCCT5/6aPeL8/UaY9359CoNO6DmhRbS466 bu68fDGtvdzfdceqXqBk7Jf96j5+V3dvogalcMuYcSwjpZg1igxBlZ5wfkKJbeGjG20j LdjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XlPN/KUwHqRjX79WcdhCu8ssre7KaU6AQV+arF/Np0U=; b=oIDAJ9cod97zx9AzYoI3w5p0KeAx/8KSWOCDik2T9nvtCZvHbg9Erxwa4jwMeu97HP Ue6dTWaGs8d/lYKdwB2U4qpHsBOy27vRfq6MTlKqBBjd0KmzGd+Ye1ayxQD8u9EOPilu 0qpvttBca0jNL+YqrfP3mTLxh5t/JWYn7sMA8P4V1iUKG+m47wvRYWvy3uOYf3N7ahDr CKifLlFOL3ud4ZICfgb1subCn0qESC2x27HOU+2Ei5bkXhzHCGTSrTbZMQkTS5kVP3V3 /2Ht4g26LxZUqJhnOQyJKqiw0E90yrJO6bk+59wIW1cIoG4e+0nKpgjItSJAQR4rUMTD oXuw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g3si1689158ilc.117.2021.07.14.03.12.29; Wed, 14 Jul 2021 03:12:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239072AbhGNKOr (ORCPT + 99 others); Wed, 14 Jul 2021 06:14:47 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:50698 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239033AbhGNKOp (ORCPT ); Wed, 14 Jul 2021 06:14:45 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 555371F42DC0 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: chunkuang.hu@kernel.org, hsinyi@chromium.org, kernel@collabora.com, drinkcat@chromium.org, eizan@chromium.org, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, jitao.shi@mediatek.com, Fabien Parent , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/7] dt-bindings: mediatek: Add #reset-cells to mmsys system controller Date: Wed, 14 Jul 2021 12:11:36 +0200 Message-Id: <20210714121116.v2.2.I3f7f1c9a8e46be07d1757ddf4e0097535f3a7d41@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210714101141.2089082-1-enric.balletbo@collabora.com> References: <20210714101141.2089082-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The mmsys system controller exposes a set of memory client resets and needs to specify the #reset-cells property in order to advertise the number of cells needed to describe each of the resets. Signed-off-by: Enric Balletbo i Serra --- (no changes since v1) .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index 78c50733985c..ce958446558e 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -17,6 +17,7 @@ Required Properties: - "mediatek,mt8173-mmsys", "syscon" - "mediatek,mt8183-mmsys", "syscon" - #clock-cells: Must be 1 +- #reset-cells: Must be 1 For the clock control, the mmsys controller uses the common clk binding from Documentation/devicetree/bindings/clock/clock-bindings.txt @@ -28,4 +29,5 @@ mmsys: syscon@14000000 { compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; -- 2.30.2