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Date:   Wed, 14 Jul 2021 17:19:14 -0600
From:   Rob Herring <robh@kernel.org>
To:     Joakim Zhang <qiangqing.zhang@nxp.com>
Cc:     davem@davemloft.net, kuba@kernel.org, andrew@lunn.ch,
        netdev@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-imx@nxp.com
Subject: Re: [PATCH V1 net-next 1/5] dt-bindings: fec: add the missing clocks
 properties
Message-ID: <20210714231914.GB3723991@robh.at.kernel.org>
References: <20210709081823.18696-1-qiangqing.zhang@nxp.com>
 <20210709081823.18696-2-qiangqing.zhang@nxp.com>
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On Fri, Jul 09, 2021 at 04:18:19PM +0800, Joakim Zhang wrote:
> From: Fugang Duan <fugang.duan@nxp.com>
> 
> Both driver and dts have already used these clocks properties, so add the
> missing clocks info.
> 
> Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
> ---
>  Documentation/devicetree/bindings/net/fsl-fec.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

There's enough changes in this series, please convert this to schema.

> 
> diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt
> index 9b543789cd52..6754be1b91c4 100644
> --- a/Documentation/devicetree/bindings/net/fsl-fec.txt
> +++ b/Documentation/devicetree/bindings/net/fsl-fec.txt
> @@ -39,6 +39,17 @@ Optional properties:
>    tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts.
>    For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse
>    per second interrupt associated with 1588 precision time protocol(PTP).
> +- clocks: Phandles to input clocks.
> +- clock-name: Should be the names of the clocks
> +  - "ipg", for MAC ipg_clk_s, ipg_clk_mac_s that are for register accessing.
> +  - "ahb", for MAC ipg_clk, ipg_clk_mac that are bus clock.
> +  - "ptp"(option), for IEEE1588 timer clock that requires the clock.
> +  - "enet_clk_ref"(option), for MAC transmit/receiver reference clock like
> +    RGMII TXC clock or RMII reference clock. It depends on board design,
> +    the clock is required if RGMII TXC and RMII reference clock source from
> +    SOC internal PLL.
> +  - "enet_out"(option), output clock for external device, like supply clock
> +    for PHY. The clock is required if PHY clock source from SOC.
>  
>  Optional subnodes:
>  - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
> -- 
> 2.17.1
> 
>