Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp233654pxv; Thu, 15 Jul 2021 03:09:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyQwzC5oboNyamkTbc14DM8LQa3eVqaJNSyGc2BB/rgyGoiCU/tz0DRgOurV6DtePKgjHgY X-Received: by 2002:a05:6e02:1aae:: with SMTP id l14mr2236468ilv.35.1626343760519; Thu, 15 Jul 2021 03:09:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626343760; cv=none; d=google.com; s=arc-20160816; b=bvdTZB1QmEPULXhTS4gRzub1gwLy9ne/ySZ7C6G4tTSFHPwwgq18rmpzhsBD1RhwSh iqj7pZWYvDlePexPAqi1YSqt4gUIEMLBF/IV1qZIqo2OO8gfq5AztOPD3Bo9DKFWd6Vf NeLuj3rm40pbfzL/x9XSOx4PM62nJru1B516RWW4txpwlKPNv4cNntjO4Ai8H5aCqp0a QBlwV/x6A2gM+FLLYDOqtqtvNARqrWyBkre6oLrv3nkpkDSlbPhQqUwHeSdLnhLLo+oD A6qArzqWlu7XKwtGh3EgIy3n77sV4oFyi8S6RCNjZ/fgVDqaRU5z2cCNLqcJ3UdHHtw+ NgwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=LrwDK5yaPnviWanB3mEz6KJd4FYQlXBbGn/qCgtfz1k=; b=YcyD3h4DTqEC+Ui91XLA+9Xm+9KAYPjjqRaOI+GpeIjqSUaiFVJa/xR2iAaUSfg4YS Y1YXMhCNFrQRNcLLwJPmzZcy2NwwwSRI3a+yj102gxL6oGBGDQ+A6rhJLQjQ07k3n32+ enkF+PnfVfoMuxWe0WIRO9jWKmiZxcrsFrjxBjNeIixWfIgEBCqdCGWyLv4tUR0m/HRT I6TX/R9vwHkj706emXDpT90QvgMIHRgDLNzgolWn/SQMqDdz2MG8SGanKgWXGji1fFmF nu2v3FP2fT+hUIimmsL0HL4ykBPhNCX3WTcb9+vsH8rFBaZpMYlP1KKXUOhTo8CEP4eA iPcg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t23si6557792iog.21.2021.07.15.03.09.08; Thu, 15 Jul 2021 03:09:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236672AbhGOG5p (ORCPT + 99 others); Thu, 15 Jul 2021 02:57:45 -0400 Received: from smtp3.hiworks.co.kr ([121.254.168.205]:27935 "EHLO smtp3.hiworks.co.kr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232953AbhGOG5o (ORCPT ); Thu, 15 Jul 2021 02:57:44 -0400 Received: (qmail 167850 invoked from network); 15 Jul 2021 15:54:49 +0900 Received: from unknown (HELO hiworks.co.kr) (192.168.10.161) by 0 (qmail 1.03 + ejcp v14) with SMTP; 15 Jul 2021 15:54:49 +0900 Received: (qmail 152933 invoked from network); 15 Jul 2021 15:54:48 +0900 Received: from unknown (HELO localhost.localdomain) (tykwon@m2i.co.kr@58.75.176.98) by 0 (qmail 1.03 + ejcp v14) with SMTP; 15 Jul 2021 15:54:48 +0900 X-Authinfo: HIWORKS SMTP authenticated From: Kwon Tae-young To: Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: Kwon Tae-young , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: imx8mq-evk: add CD pinctrl for usdhc2 Date: Thu, 15 Jul 2021 15:54:31 +0900 Message-Id: <20210715065431.25370-1-tykwon@m2i.co.kr> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add CD pinctrl for usdhc2. Signed-off-by: Kwon Tae-young --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index 4d2035e3dd7c..87f571d6d843 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -403,9 +403,9 @@ assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; assigned-clock-rates = <200000000>; pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; status = "okay"; @@ -565,6 +565,12 @@ >; }; + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 + >; + }; + pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 -- 2.17.1