Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp638196pxv; Thu, 15 Jul 2021 12:09:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxEAk/J/GlJJ10IWsTwXDlXIhFb6TrraDtDfrGoP6KPWttjU01fW21IcGHtpzEoQCshAWGV X-Received: by 2002:a17:907:7786:: with SMTP id ky6mr7244248ejc.93.1626376166061; Thu, 15 Jul 2021 12:09:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626376166; cv=none; d=google.com; s=arc-20160816; b=dnBkak4MdGzGnHoQqFMSoCO2h7zd8zrEY41KhBXxscvbgr4t+jYcaJdgAOJK4xgf2L hS4LY4L07P3+rWJmrn5iFoE/sCRthB/5rBzcUjXqhWcA3eTlzjMKC5ntKdxq1SYf+yMM AiiCHx3gtGxcv7cR33Bb/uyoiF3915splI7blkx9SwtZEwHLRUoQdwd6Wf7XF2tZOT55 P5IfdNQoZKM5tqWjLxpDFWhcmHA/+rneIlS7eE0Oid5O4ELoWNXzL/Ann0Sq0UC/qNjz j3JQSQxsB+fjdNgRYDzTlYZCt5Dfa0waFk6TWGOCP4flrtm7003ttq9wHBCM55Olpf06 GvVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=SA+ISfOHQcGJRPKGeZNCl0aWrvp81WGdQJt3vVrMs4c=; b=TfxHwIW1QgSbfLxrnLUdyAkSf+BSLQn/KSjrlwrWVCQ1whycUkQPUvIEi5Oa+Mv7Qf gt5BMtYvMCP+v9Xt2uw10bSpFKY8RYkCcXLDxsMOgeZxZSARigcNxqozIRUf46nY+waO MZICecJiH2rbSx+Wz180iCPqUb8mUZu8HsmPm6KyB8JR0FxqYujeU2un9mIMM1FtVi6p NbVz+Mh74QGdKFDasZGzqVU2zPh4O1RHuwQNzmzRTT3hMPd0tapWRhnsJx4jLFv4T+Bs kjlNfNmSUMl0EmKoQSoavzLtP/4SfJ0MwKda5T2Zr8rHVD/LI/+Qt4qVMvrq62qagyPh TKZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=qiDbD5rR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u15si8119315ejb.376.2021.07.15.12.09.02; Thu, 15 Jul 2021 12:09:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=qiDbD5rR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243381AbhGOTJr (ORCPT + 99 others); Thu, 15 Jul 2021 15:09:47 -0400 Received: from mail.kernel.org ([198.145.29.99]:35148 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241114AbhGOS6u (ORCPT ); Thu, 15 Jul 2021 14:58:50 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 91843610C7; Thu, 15 Jul 2021 18:55:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1626375350; bh=lFRZNA2axd6y0gh1OLNz3qNQ8ml1pC4bSsvWlDJIezE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qiDbD5rRpysRkTYtmiwyGBF+vXhE6FUBH95o/j8sud32Z9K6KqtYFWpxmJzB1bdY4 qjDTgavdGMbmOluc4nYaVkF4MsMqx1/3HZl6mKyNWcSKcnQZyJemDGQ3yKW5nnaYcL 2GWd2O5lor/SS/NUvKNcpZe2NBXZti13Amp3p4vQ= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Paul Cercueil , Thomas Bogendoerfer , Sasha Levin Subject: [PATCH 5.12 049/242] MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER Date: Thu, 15 Jul 2021 20:36:51 +0200 Message-Id: <20210715182600.838155220@linuxfoundation.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210715182551.731989182@linuxfoundation.org> References: <20210715182551.731989182@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Paul Cercueil [ Upstream commit eb3849370ae32b571e1f9a63ba52c61adeaf88f7 ] The clock driving the XBurst CPUs in Ingenic SoCs is integer divided from the main PLL. As such, it is possible to control the frequency of the CPU, either by changing the divider, or by changing the rate of the main PLL. The XBurst CPUs also lack the CP0 timer; the TCU, a separate piece of hardware in the SoC, provides this functionality. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer Signed-off-by: Sasha Levin --- arch/mips/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index e89d63cd92d1..ab73622b14dd 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -425,6 +425,8 @@ config MACH_INGENIC_SOC select MIPS_GENERIC select MACH_INGENIC select SYS_SUPPORTS_ZBOOT_UART16550 + select CPU_SUPPORTS_CPUFREQ + select MIPS_EXTERNAL_TIMER config LANTIQ bool "Lantiq based platforms" -- 2.30.2