Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp713578pxv; Thu, 15 Jul 2021 14:12:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxDKskKDPVsNxsNKcTu2NdPi07D5n9YcEObkF2rkKigrYBbzvUnk22rM0rK0C7rFIIfaUF+ X-Received: by 2002:a05:6402:22f4:: with SMTP id dn20mr9596139edb.335.1626383565749; Thu, 15 Jul 2021 14:12:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626383565; cv=none; d=google.com; s=arc-20160816; b=UEVZVrTjGp823P6xMttu0THZ2eOwKTxTaSJKzUM+gvx79Zb71o2yGAr7fvVWp4wF7S Z+CmqPpLvrkgEBxD+QmKpZhqdNMgtutGXkNSsuDRoKY81zaI2Fr+yrQLcpEFU7B17Wmc sz1+44GeFTJ2KJioS6qRD3gz6pGYcgATJh/hpb3ExgB7wlUxZzUoi4vnZt2AufspEHFx +/nb2qXbQIW4BU2U1+7q70YgfPV5Krcy3tbGC7m6GjyY04PiuidWnreBudCkMu2taGMq zMBZJY1PGAg48YFdEuCMc4NA4osnRmkbuTLtdXbJKWTw/3BcYa/NdPR4YKR1bXcCnDTk tH8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=jKutqtkmnFi0DSB/xc48xDicVsC1VP+HmpEhRAXhWDo=; b=mQlf0Uxpm0391YUKjLkEGIbt46fHzdxO5tDqaePMm/sYMjfJl6Mf4FekbANijJB2cY swRaXA0Kaj2jq+YdfiuDlIqOFe80EBptRvU6cOfqC1ynHi5FA0ComTB1zsBLxz9Kc3mj BOi+mgy7k8c22mWGXuIrX65Fr/yEZG1bsHNM5hZ6p4UuOFITEsyXfkz5eXENzty49QiQ FRoQGzZeHSEDvyy+z/sF2mYAQJlBiAco4GWzuHXRFUy7QE36AeBGWQ7Xe3AFGMAI0nxh iHy7c1pxL4SL2g8S50cTH/MaBf8z2COcnzk0Rl3wTPhwOyS/F9Uo9c3WN63H7IFOim+B w2sg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=OCnjcKt7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s23si8381385edw.108.2021.07.15.14.12.23; Thu, 15 Jul 2021 14:12:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=OCnjcKt7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243333AbhGOTbH (ORCPT + 99 others); Thu, 15 Jul 2021 15:31:07 -0400 Received: from mail.kernel.org ([198.145.29.99]:45710 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243491AbhGOTJx (ORCPT ); Thu, 15 Jul 2021 15:09:53 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 81781613C0; Thu, 15 Jul 2021 19:05:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1626375945; bh=yF3Xfk587sd+A00D3s6oJyfhF4EB3WXKxWmJ+VimC3M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OCnjcKt7+tsMm1GW/GOIkO3h4BC4EuyEoDC/wgR7RZT9KTJVp0/XGMI8Rcll/8ENu Rj/EZzFUowPXxXrgXLwduwJEKORE+kyX06k8PD6G1LBAFsexBWlcM6WM9Cv+DwDSia PTKHQaB4j3W0pB+MNeWWc2NTc0M7z5jBWtSCJ4Bs= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Paul Cercueil , Thomas Bogendoerfer , Sasha Levin Subject: [PATCH 5.13 059/266] MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER Date: Thu, 15 Jul 2021 20:36:54 +0200 Message-Id: <20210715182624.645494169@linuxfoundation.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210715182613.933608881@linuxfoundation.org> References: <20210715182613.933608881@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Paul Cercueil [ Upstream commit eb3849370ae32b571e1f9a63ba52c61adeaf88f7 ] The clock driving the XBurst CPUs in Ingenic SoCs is integer divided from the main PLL. As such, it is possible to control the frequency of the CPU, either by changing the divider, or by changing the rate of the main PLL. The XBurst CPUs also lack the CP0 timer; the TCU, a separate piece of hardware in the SoC, provides this functionality. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer Signed-off-by: Sasha Levin --- arch/mips/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ed51970c08e7..344e6c622efd 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -428,6 +428,8 @@ config MACH_INGENIC_SOC select MIPS_GENERIC select MACH_INGENIC select SYS_SUPPORTS_ZBOOT_UART16550 + select CPU_SUPPORTS_CPUFREQ + select MIPS_EXTERNAL_TIMER config LANTIQ bool "Lantiq based platforms" -- 2.30.2