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From:   Peng Fan <peng.fan@nxp.com>
To:     "Daniel Baluta (OSS)" <daniel.baluta@oss.nxp.com>,
        "shawnguo@kernel.org" <shawnguo@kernel.org>
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        Joakim Zhang <qiangqing.zhang@nxp.com>,
        Alice Guo <alice.guo@nxp.com>, Robin Gong <yibin.gong@nxp.com>,
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        <linux-arm-kernel@lists.infradead.org>,
        "daniel.baluta@gmail.com" <daniel.baluta@gmail.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Daniel Baluta <daniel.baluta@nxp.com>
Subject: RE: [PATCH] arm64: dts: imx8mp: Add dsp node
Thread-Topic: [PATCH] arm64: dts: imx8mp: Add dsp node
Thread-Index: AQHXeXDTbMleKUuYN0eRaFQ/sPkRQqtE2urA
Date:   Fri, 16 Jul 2021 02:05:40 +0000
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References: <20210715115853.749025-1-daniel.baluta@oss.nxp.com>
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Hi Daniel

> Subject: [PATCH] arm64: dts: imx8mp: Add dsp node
>=20
> From: Daniel Baluta <daniel.baluta@nxp.com>
>=20
> i.MX8 MPlus SoC integrates Cadence HIFI4 DSP. This core runs either a cus=
tom
> firmware or the open source SOF firmware [1]
>=20
> DSP device is handled by SOF OF driver found in sound/soc/sof/sof-of-dev.=
c
>=20
> Notice that the DSP node makes use of:
> 	- dsp_reserved, a reserved memory region for various Audio
> 	  resources (e.g firmware loading, audio buffers, etc).
> 	- Messaging Unit (mu2) for passing notifications betweem ARM
> 	  core and DSP.
>=20
> [1] https://thesofproject.github.io/latest/platforms/index.html
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 28
> +++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>=20
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 9f7c7f587d38..264ba540f363 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -135,6 +135,17 @@ clk_ext4: clock-ext4 {
>  		clock-output-names =3D "clk_ext4";
>  	};
>=20
> +	reserved-memory {
> +		#address-cells =3D <2>;
> +		#size-cells =3D <2>;
> +		ranges;
> +
> +		dsp_reserved: dsp@92400000 {
> +			reg =3D <0 0x92400000 0 0x2000000>;
> +			no-map;
> +		};
> +	};
> +
>  	pmu {
>  		compatible =3D "arm,cortex-a53-pmu";
>  		interrupts =3D <GIC_PPI 7
> @@ -698,6 +709,13 @@ mu: mailbox@30aa0000 {
>  				#mbox-cells =3D <2>;
>  			};
>=20
> +			mu2: mailbox@30e60000 {
> +				compatible =3D "fsl,imx8mp-mu", "fsl,imx6sx-mu";
> +				reg =3D <0x30e60000 0x10000>;
> +				interrupts =3D <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
> +				#mbox-cells =3D <2>;

I think better mark this node as disabled. If its clock not enabled,
kernel may hang.

Regards,
Peng.

> +			};
> +
>  			i2c5: i2c@30ad0000 {
>  				compatible =3D "fsl,imx8mp-i2c", "fsl,imx21-i2c";
>  				#address-cells =3D <1>;
> @@ -938,5 +956,15 @@ usb_dwc3_1: usb@38200000 {
>  				snps,dis-u2-freeclk-exists-quirk;
>  			};
>  		};
> +		dsp: dsp@3b6e8000 {
> +			compatible =3D "fsl,imx8mp-dsp";
> +			reg =3D <0x3b6e8000 0x88000>;
> +			mbox-names =3D "txdb0", "txdb1",
> +				"rxdb0", "rxdb1";
> +			mboxes =3D <&mu2 2 0>, <&mu2 2 1>,
> +				<&mu2 3 0>, <&mu2 3 1>;
> +			memory-region =3D <&dsp_reserved>;
> +			status =3D "disabled";
> +		};
>  	};
>  };
> --
> 2.27.0