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[2001:1c00:c1e:bf00:1054:9d19:e0f0:8214]) by smtp.gmail.com with ESMTPSA id b10sm5014305edd.91.2021.07.17.08.32.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 17 Jul 2021 08:32:46 -0700 (PDT) Subject: Re: [PATCH v5 0/5] Add Alder Lake PCH-S support to PMC core driver To: Gayatri Kammela , platform-driver-x86@vger.kernel.org Cc: mgross@linux.intel.com, irenic.rajneesh@gmail.com, andriy.shevchenko@linux.intel.com, vicamo.yang@canonical.com, srinivas.pandruvada@intel.com, david.e.box@intel.com, linux-kernel@vger.kernel.org, tamar.mashiah@intel.com, gregkh@linuxfoundation.org, rajatja@google.com, Shyam-sundar.S-k@amd.com, Alexander.Deucher@amd.com, mlimonci@amd.com References: From: Hans de Goede Message-ID: <2a5ef70e-7194-1dcf-6653-9901c7470ace@redhat.com> Date: Sat, 17 Jul 2021 17:32:45 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 7/16/21 8:38 PM, Gayatri Kammela wrote: > Hi, > The patch series move intel_pmc_core* files to pmc subfolder as well as > add Alder Lake PCH-S support to PMC core driver. > > Patch 1: Move intel_pmc_core* files to pmc subfolder > Patch 2: Add Alderlake support to pmc core driver > Patch 3: Add Latency Tolerance Reporting (LTR) support to Alder Lake > Patch 4: Add Alder Lake low power mode support for pmc core > Patch 5: Add GBE Package C10 fix for Alder Lake > > Changes since v1: > 1) Add patch 1 to v2 i.e., Move intel_pmc_core* files to pmc subfolder. > 2) Modify commit message for patch 2. > > Changes since v2: > 1) Dropped intel_pmc_ prefix from the file names. > > Changes since v3: > 1) Fixed an error reported by lkp. > > Changes since v4: > 1) Updated MAINTAINERS > > > David E. Box (1): > platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake > PCH > > Gayatri Kammela (4): > platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc > subfolder > platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver > platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR) > support to Alder Lake > platform/x86/intel: pmc/core: Add Alder Lake low power mode support > for pmc core > > MAINTAINERS | 2 +- > drivers/platform/x86/Kconfig | 21 -- > drivers/platform/x86/Makefile | 1 - > drivers/platform/x86/intel/Kconfig | 1 + > drivers/platform/x86/intel/Makefile | 1 + > drivers/platform/x86/intel/pmc/Kconfig | 22 ++ > drivers/platform/x86/intel/pmc/Makefile | 5 + > .../{intel_pmc_core.c => intel/pmc/core.c} | 309 +++++++++++++++++- > .../{intel_pmc_core.h => intel/pmc/core.h} | 17 + > .../pmc/pltdrv.c} | 0 > 10 files changed, 352 insertions(+), 27 deletions(-) > create mode 100644 drivers/platform/x86/intel/pmc/Kconfig > create mode 100644 drivers/platform/x86/intel/pmc/Makefile > rename drivers/platform/x86/{intel_pmc_core.c => intel/pmc/core.c} (85%) > rename drivers/platform/x86/{intel_pmc_core.h => intel/pmc/core.h} (95%) > rename drivers/platform/x86/{intel_pmc_core_pltdrv.c => intel/pmc/pltdrv.c} (100%) > > Cc: Srinivas Pandruvada > Cc: Andy Shevchenko > Cc: David Box > Cc: You-Sheng Yang > Cc: Hans de Goede > Cc: Rajneesh Bhardwaj > > base-commit: d936eb23874433caa3e3d841cfa16f5434b85dcf Thank you for your patch-series, I've applied the series to my review-hans branch: https://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git/log/?h=review-hans Note it will show up in my review-hans branch once I've pushed my local branch there, which might take a while. Once I've run some tests on this branch the patches there will be added to the platform-drivers-x86/for-next branch and eventually will be included in the pdx86 pull-request to Linus for the next merge-window. Regards, Hans