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[23.128.96.18]) by mx.google.com with ESMTP id r26si19752488edt.275.2021.07.18.11.53.46; Sun, 18 Jul 2021 11:54:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230254AbhGRSzr (ORCPT + 99 others); Sun, 18 Jul 2021 14:55:47 -0400 Received: from mga12.intel.com ([192.55.52.136]:61756 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229525AbhGRSzr (ORCPT ); Sun, 18 Jul 2021 14:55:47 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10049"; a="190550905" X-IronPort-AV: E=Sophos;i="5.84,249,1620716400"; d="gz'50?scan'50,208,50";a="190550905" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jul 2021 11:52:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,249,1620716400"; d="gz'50?scan'50,208,50";a="659461999" Received: from lkp-server01.sh.intel.com (HELO a467b34d8c10) ([10.239.97.150]) by fmsmga005.fm.intel.com with ESMTP; 18 Jul 2021 11:52:47 -0700 Received: from kbuild by a467b34d8c10 with local (Exim 4.92) (envelope-from ) id 1m5BuA-0000Op-EV; Sun, 18 Jul 2021 18:52:46 +0000 Date: Mon, 19 Jul 2021 02:52:02 +0800 From: kernel test robot To: Daniel Palmer Cc: kbuild-all@lists.01.org, linux-kernel@vger.kernel.org Subject: [linux-chenxing:mstar_v5_14_rebase_i2_drm 257/349] drivers/clk/mstar/clk-msc313-mux.c:27:2: error: implicit declaration of function 'regmap_field_read'; did you mean 'regmap_field_write'? Message-ID: <202107190200.Z2RoQoYz-lkp@intel.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="jRHKVT23PllUwdXP" Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --jRHKVT23PllUwdXP Content-Type: text/plain; charset=us-ascii Content-Disposition: inline tree: git://github.com/linux-chenxing/linux.git mstar_v5_14_rebase_i2_drm head: 93dfb2364436067bf34c6d4ddcd282496182cc0f commit: 395724ba20fe2aa13e0167b43b6914f94f128df0 [257/349] clk: mstar: msc313 clock mux base config: mips-bigsur_defconfig (attached as .config) compiler: mips64-linux-gcc (GCC) 10.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/linux-chenxing/linux/commit/395724ba20fe2aa13e0167b43b6914f94f128df0 git remote add linux-chenxing git://github.com/linux-chenxing/linux.git git fetch --no-tags linux-chenxing mstar_v5_14_rebase_i2_drm git checkout 395724ba20fe2aa13e0167b43b6914f94f128df0 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): drivers/clk/mstar/clk-msc313-mux.c: In function 'msc313_mux_mux_get_parent': >> drivers/clk/mstar/clk-msc313-mux.c:27:2: error: implicit declaration of function 'regmap_field_read'; did you mean 'regmap_field_write'? [-Werror=implicit-function-declaration] 27 | regmap_field_read(mux->mux, &index); | ^~~~~~~~~~~~~~~~~ | regmap_field_write drivers/clk/mstar/clk-msc313-mux.c: In function 'msc313_mux_register_muxes': >> drivers/clk/mstar/clk-msc313-mux.c:146:10: error: variable 'gate_field' has initializer but incomplete type 146 | struct reg_field gate_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~ >> drivers/clk/mstar/clk-msc313-mux.c:146:33: error: implicit declaration of function 'REG_FIELD' [-Werror=implicit-function-declaration] 146 | struct reg_field gate_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~ >> drivers/clk/mstar/clk-msc313-mux.c:146:20: error: storage size of 'gate_field' isn't known 146 | struct reg_field gate_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~~ >> drivers/clk/mstar/clk-msc313-mux.c:148:10: error: variable 'mux_field' has initializer but incomplete type 148 | struct reg_field mux_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~ >> drivers/clk/mstar/clk-msc313-mux.c:148:20: error: storage size of 'mux_field' isn't known 148 | struct reg_field mux_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~ >> drivers/clk/mstar/clk-msc313-mux.c:150:10: error: variable 'deglitch_field' has initializer but incomplete type 150 | struct reg_field deglitch_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~ >> drivers/clk/mstar/clk-msc313-mux.c:150:20: error: storage size of 'deglitch_field' isn't known 150 | struct reg_field deglitch_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~~~~~~ >> drivers/clk/mstar/clk-msc313-mux.c:157:16: error: implicit declaration of function 'devm_regmap_field_alloc' [-Werror=implicit-function-declaration] 157 | mux->gate = devm_regmap_field_alloc(dev, regmap, gate_field); | ^~~~~~~~~~~~~~~~~~~~~~~ drivers/clk/mstar/clk-msc313-mux.c:150:20: warning: unused variable 'deglitch_field' [-Wunused-variable] 150 | struct reg_field deglitch_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~~~~~~ drivers/clk/mstar/clk-msc313-mux.c:148:20: warning: unused variable 'mux_field' [-Wunused-variable] 148 | struct reg_field mux_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~ drivers/clk/mstar/clk-msc313-mux.c:146:20: warning: unused variable 'gate_field' [-Wunused-variable] 146 | struct reg_field gate_field = REG_FIELD(mux_data->offset, | ^~~~~~~~~~ cc1: some warnings being treated as errors vim +27 drivers/clk/mstar/clk-msc313-mux.c 21 22 static u8 msc313_mux_mux_get_parent(struct clk_hw *hw) 23 { 24 struct msc313_mux *mux = mux_to_mux(hw); 25 unsigned int index; 26 > 27 regmap_field_read(mux->mux, &index); 28 29 return index; 30 } 31 32 static const struct clk_ops msc313_mux_mux_ops = { 33 .set_parent = msc313_mux_mux_set_parent, 34 .get_parent = msc313_mux_mux_get_parent, 35 }; 36 37 static int msc313_mux_deglitch_enable(struct clk_hw *hw) 38 { 39 struct msc313_mux *mux = deglitch_to_mux(hw); 40 41 if (mux->gate) 42 regmap_field_write(mux->gate, 0); 43 44 return 0; 45 } 46 47 static void msc313_mux_deglitch_disable(struct clk_hw *hw) 48 { 49 struct msc313_mux *mux = deglitch_to_mux(hw); 50 51 if (mux->gate) 52 regmap_field_write(mux->gate, 1); 53 } 54 55 static int msc313_mux_deglitch_is_enabled(struct clk_hw *hw) 56 { 57 struct msc313_mux *mux = deglitch_to_mux(hw); 58 unsigned int notgated; 59 60 if (mux->gate) { 61 regmap_field_read(mux->gate, ¬gated); 62 return !notgated; 63 } 64 65 return 1; 66 } 67 68 static int msc313_mux_deglitch_set_parent(struct clk_hw *hw, u8 index) 69 { 70 struct msc313_mux *mux = deglitch_to_mux(hw); 71 72 if (!mux->deglitch) 73 return -ENOTSUPP; 74 75 return regmap_field_write(mux->deglitch, index); 76 } 77 78 static u8 msc313_mux_deglitch_get_parent(struct clk_hw *hw) 79 { 80 struct msc313_mux *mux = deglitch_to_mux(hw); 81 unsigned int index = 0; 82 83 if (mux->deglitch){ 84 regmap_field_read(mux->deglitch, &index); 85 } 86 87 return index; 88 } 89 90 static const struct clk_ops msc313_mux_deglitch_ops = { 91 .enable = msc313_mux_deglitch_enable, 92 .disable = msc313_mux_deglitch_disable, 93 .is_enabled = msc313_mux_deglitch_is_enabled, 94 .set_parent = msc313_mux_deglitch_set_parent, 95 .get_parent = msc313_mux_deglitch_get_parent, 96 }; 97 98 struct clk_hw *msc313_mux_xlate(struct of_phandle_args *clkspec, void *data) 99 { 100 struct msc313_muxes *muxes = data; 101 unsigned int of_idx = clkspec->args[0]; 102 unsigned int idx = of_idx / 2; 103 104 /* mux, deglitch, mux, deglitch,.. */ 105 if (of_idx >= muxes->muxes_data->num_muxes * 2) 106 return ERR_PTR(-EINVAL); 107 108 if (of_idx % 2) 109 return &muxes->muxes[idx].deglitch_hw; 110 111 return &muxes->muxes[idx].mux_hw; 112 } 113 114 struct msc313_muxes *msc313_mux_register_muxes(struct device *dev, 115 struct regmap *regmap, const struct msc313_muxes_data *muxes_data, 116 int (*fill_clk_parent_data)(struct clk_parent_data*, void*, const void*, const struct msc313_muxes*, unsigned int, unsigned int), void *data) 117 { 118 const struct msc313_mux_data *mux_data = muxes_data->muxes; 119 struct clk_init_data mux_init = { 120 .ops = &msc313_mux_mux_ops, 121 }; 122 struct clk_init_data deglitch_init = { 123 .ops = &msc313_mux_deglitch_ops, 124 }; 125 struct clk_parent_data *dynamic_parent_data = NULL; 126 struct msc313_muxes *muxes; 127 struct msc313_mux *mux; 128 struct clk_hw *clk_hw; 129 int i, ret, mux_parent; 130 131 /* 132 * If using the dynamic clk_parent_data mode you have to have both 133 * a callback and data. 134 */ 135 if ((fill_clk_parent_data && !data) || (!fill_clk_parent_data && data)) 136 return ERR_PTR(-EINVAL); 137 138 muxes = devm_kzalloc(dev, struct_size(muxes, muxes, muxes_data->num_muxes), GFP_KERNEL); 139 if (!muxes) 140 return ERR_PTR(-ENOMEM); 141 142 muxes->muxes_data = muxes_data; 143 mux = muxes->muxes; 144 145 for (i = 0; i < muxes_data->num_muxes; i++, mux++, mux_data++) { > 146 struct reg_field gate_field = REG_FIELD(mux_data->offset, 147 mux_data->gate_shift, mux_data->gate_shift); > 148 struct reg_field mux_field = REG_FIELD(mux_data->offset, 149 mux_data->mux_shift, mux_data->mux_shift + (mux_data->mux_width - 1)); > 150 struct reg_field deglitch_field = REG_FIELD(mux_data->offset, 151 mux_data->deglitch_shift, mux_data->deglitch_shift); 152 153 if(!mux_data->name) 154 continue; 155 156 if (mux_data->gate_shift != -1) { > 157 mux->gate = devm_regmap_field_alloc(dev, regmap, gate_field); --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org --jRHKVT23PllUwdXP Content-Type: application/gzip Content-Disposition: attachment; filename=".config.gz" Content-Transfer-Encoding: base64 H4sICN129GAAAy5jb25maWcAjDzZk+Om0+/5K1Sbl6Qqx1zrbL6v5gFJyCaWhAaQj3lReWe8 m6nMseXx5Pjvf92gAxDy7kOyo+6mgabpC/D3330fkbfjy9Pu+HC3e3z8L/q8f94fdsf9ffTp 4XH//1HKo5KriKZM/QLE+cPz27+/Pj18eY3e/3J++ctZtNwfnvePUfLy/Onh8xs0fXh5/u77 7xJeZmzeJEmzokIyXjaKbtT1O2w6u/r5Efn8/PnuLvphniQ/RudnvwCzd1YzJhvAXP/XgeYD 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