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From:   Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
To:     Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
        Rob Herring <robh+dt@kernel.org>
Cc:     devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org,
        Masami Hiramatsu <mhiramat@kernel.org>,
        Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Subject: [PATCH v2 1/2] dt-bindings: nvmem: Extend patternProperties to optionally indicate bit position
Date:   Mon, 19 Jul 2021 11:31:03 +0900
Message-Id: <1626661864-15473-2-git-send-email-hayashi.kunihiko@socionext.com>
In-Reply-To: <1626661864-15473-1-git-send-email-hayashi.kunihiko@socionext.com>
References: <1626661864-15473-1-git-send-email-hayashi.kunihiko@socionext.com>
Precedence: bulk

Allow to extend expression of sub nodes to optionally indicate bit
position. This extension is needed to distinguish between different bit
positions in the same address.

For example, there are two nvmem nodes starting with bit 4 and bit 0
at the same address 0x54. In this case, it can be expressed as follows.

    trim@54,4 {
        reg = <0x54 1>;
        bits = <4 2>;
    };
    trim@54,0 {
        reg = <0x54 1>;
        bits = <0 4>;
    };

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
index b8dc3d2..9dfe196 100644
--- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
+++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
@@ -40,7 +40,7 @@ properties:
     maxItems: 1
 
 patternProperties:
-  "^.*@[0-9a-f]+$":
+  "^.*@[0-9a-f]+(,[0-9]+)?$":
     type: object
 
     properties:
-- 
2.7.4