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Date:   Mon, 19 Jul 2021 16:47:58 -0400
From:   Yazen Ghannam <yazen.ghannam@amd.com>
To:     Naveen Krishna Chatradhi <nchatrad@amd.com>,
        Tony Luck <tony.luck@intel.com>
Cc:     linux-edac@vger.kernel.org, x86@kernel.org,
        linux-kernel@vger.kernel.org, bp@alien8.de, mingo@redhat.com,
        mchehab@kernel.org
Subject: Re: [PATCH 3/7] EDAC/mc: Add new HBM2 memory type
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On Wed, Jun 30, 2021 at 08:58:24PM +0530, Naveen Krishna Chatradhi wrote:
> Add a new entry to 'enum mem_type' and a new string to 'edac_mem_types[]'
> for HBM2 (High Bandwidth Memory Gen 2) new memory type.
> 
> Signed-off-by: Muralidhara M K <muralimk@amd.com>
> Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com>
> ---
>  drivers/edac/edac_mc.c | 1 +
>  include/linux/edac.h   | 3 +++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
> index f6d462d0be2d..2c5975674723 100644
> --- a/drivers/edac/edac_mc.c
> +++ b/drivers/edac/edac_mc.c
> @@ -166,6 +166,7 @@ const char * const edac_mem_types[] = {
>  	[MEM_DDR5]	= "Unbuffered-DDR5",
>  	[MEM_NVDIMM]	= "Non-volatile-RAM",
>  	[MEM_WIO2]	= "Wide-IO-2",
> +	[MEM_HBM2]	= "High-bandwidth-memory-Gen2",
>  };
>  EXPORT_SYMBOL_GPL(edac_mem_types);
>  
> diff --git a/include/linux/edac.h b/include/linux/edac.h
> index 76d3562d3006..4207d06996a4 100644
> --- a/include/linux/edac.h
> +++ b/include/linux/edac.h
> @@ -184,6 +184,7 @@ static inline char *mc_event_error_type(const unsigned int err_type)
>   * @MEM_DDR5:		Unbuffered DDR5 RAM
>   * @MEM_NVDIMM:		Non-volatile RAM
>   * @MEM_WIO2:		Wide I/O 2.
> + * @MEM_HBM2:		High bandwidth Memory Gen 2.
>   */
>  enum mem_type {
>  	MEM_EMPTY = 0,
> @@ -212,6 +213,7 @@ enum mem_type {
>  	MEM_DDR5,
>  	MEM_NVDIMM,
>  	MEM_WIO2,
> +	MEM_HBM2,
>  };
>  
>  #define MEM_FLAG_EMPTY		BIT(MEM_EMPTY)
> @@ -239,6 +241,7 @@ enum mem_type {
>  #define MEM_FLAG_DDR5           BIT(MEM_DDR5)
>  #define MEM_FLAG_NVDIMM         BIT(MEM_NVDIMM)
>  #define MEM_FLAG_WIO2		BIT(MEM_WIO2)
> +#define MEM_FLAG_HBM2		BIT(MEM_HBM2)
>  
>  /**
>   * enum edac_type - Error Detection and Correction capabilities and mode
> -- 

Looks okay to me.

Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>

Tony,
The following commit added HBM support to some Intel EDAC code.

  c945088384d0 EDAC/i10nm: Add support for high bandwidth memory

But it didn't include a new mem_type for HBM. Should it have?

I only see some edac_mem_types use in sysfs and some debug messages. So
I'm curious if users find this information useful.

Thanks,
Yazen