Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp4209262pxv; Mon, 19 Jul 2021 20:32:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJydYFxT50XBUbQ3rSr7HFI/pGmcGx1bM0wBOGBnyWf8NYvhLXJlBkYHBZ94aSOJ/FKSHfOp X-Received: by 2002:a50:d982:: with SMTP id w2mr14521677edj.338.1626751939962; Mon, 19 Jul 2021 20:32:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626751939; cv=none; d=google.com; s=arc-20160816; b=GzXja4hyPU5vse0W4pWvu7MDyqwuUNFS+05s+nIoo/GHiK9nDJdJH3vkal743P64Bu ehdIj7+3H/j6BYZSzE4RmYcUM/mi3az6EGTG0heHulklLjUdTPMKCfSKaNObcow38hXJ sraDeaGVWrdbIPPqXGzFDz1yio3AO9bmiDADQMUM8W58ddDYR+BazPUjxxKgQVcoPlO4 HUpSIpY92rP30JUyfXIqcfUekzFMjDrBCgVb73GSOPpK2LOxUw6/4aps7X0mLksEaOeI +g51Or4FZlJReIyztp5HHpOKwEGlnHw9vSh+pAbG+wGEO40sScrH9GTcWgJ68BoX37kB HRnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:user-agent:references:message-id :in-reply-to:subject:cc:to:from:date; bh=f2FlxFUNftZ0Z/7PMDpqlHwVm3EAVwQXF7eTL0OLbRY=; b=sUT8J4SMukBQg6w5/rahQK7C8BNpyAKgLE5f6p5WzgZw6UQm0O/+RwjBnWvHb72zI8 Qwx87+8H4OF+NaFJVyQYJNGvTDhrIX9BJKxRBGlFAHs/cUtnHxQuxN8tKbuvFORghwAt ourCXeAPwmmrYNvONsUCvwCHDR1ILEAnfqpYzFKOWxAiYX2QWUQ5yjZi7LMxHC4GoT8v chPEoF2xIavRZfuSXilN3w0AA2M19OHA1lbifpnc3HFlrVB1EwueA+rKuXkf6rTWt2JZ gOYPX0LLpwGEHdzmoV2GsurQ0EpfCX6TU61eWnFXPq51pN3V4zbD9Dp6E5hXFyFl2Ful 85IA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id rl18si11902836ejb.488.2021.07.19.20.31.57; Mon, 19 Jul 2021 20:32:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346338AbhGTCte (ORCPT + 99 others); Mon, 19 Jul 2021 22:49:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233549AbhGTCre (ORCPT ); Mon, 19 Jul 2021 22:47:34 -0400 Received: from angie.orcam.me.uk (angie.orcam.me.uk [IPv6:2001:4190:8020::34]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 9F164C061574; Mon, 19 Jul 2021 20:28:13 -0700 (PDT) Received: by angie.orcam.me.uk (Postfix, from userid 500) id 1FAF89200BF; Tue, 20 Jul 2021 05:28:09 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by angie.orcam.me.uk (Postfix) with ESMTP id 1A3049200BB; Tue, 20 Jul 2021 05:28:09 +0200 (CEST) Date: Tue, 20 Jul 2021 05:28:09 +0200 (CEST) From: "Maciej W. Rozycki" To: Nikolai Zhubr , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Bjorn Helgaas , "Rafael J. Wysocki" , Len Brown , Pavel Machek , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel cc: x86@kernel.org, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/6] x86: Avoid magic number with ELCR register accesses In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define PIC_ELCR1 and PIC_ELCR2 macros for accesses to the ELCR registers implemented by many chipsets in their embedded 8259A PIC cores, avoiding magic numbers that are difficult to handle, and complementing the macros we already have for registers originally defined with discrete 8259A PIC implementations. No functional change. Signed-off-by: Maciej W. Rozycki --- This deliberately doesn't touch KVM, which refrains from using macros for any PIC accesses. --- arch/x86/include/asm/i8259.h | 2 ++ arch/x86/kernel/acpi/boot.c | 6 +++--- arch/x86/kernel/apic/io_apic.c | 2 +- arch/x86/kernel/apic/vector.c | 2 +- arch/x86/kernel/i8259.c | 8 ++++---- arch/x86/kernel/mpparse.c | 3 ++- arch/x86/pci/irq.c | 3 ++- 7 files changed, 15 insertions(+), 11 deletions(-) linux-x86-pic-elcr.diff Index: linux-macro-pirq/arch/x86/include/asm/i8259.h =================================================================== --- linux-macro-pirq.orig/arch/x86/include/asm/i8259.h +++ linux-macro-pirq/arch/x86/include/asm/i8259.h @@ -19,6 +19,8 @@ extern unsigned int cached_irq_mask; #define PIC_MASTER_OCW3 PIC_MASTER_ISR #define PIC_SLAVE_CMD 0xa0 #define PIC_SLAVE_IMR 0xa1 +#define PIC_ELCR1 0x4d0 +#define PIC_ELCR2 0x4d1 /* i8259A PIC related value */ #define PIC_CASCADE_IR 2 Index: linux-macro-pirq/arch/x86/kernel/acpi/boot.c =================================================================== --- linux-macro-pirq.orig/arch/x86/kernel/acpi/boot.c +++ linux-macro-pirq/arch/x86/kernel/acpi/boot.c @@ -570,7 +570,7 @@ void __init acpi_pic_sci_set_trigger(uns unsigned int old, new; /* Real old ELCR mask */ - old = inb(0x4d0) | (inb(0x4d1) << 8); + old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8); /* * If we use ACPI to set PCI IRQs, then we should clear ELCR @@ -596,8 +596,8 @@ void __init acpi_pic_sci_set_trigger(uns return; pr_warn("setting ELCR to %04x (from %04x)\n", new, old); - outb(new, 0x4d0); - outb(new >> 8, 0x4d1); + outb(new, PIC_ELCR1); + outb(new >> 8, PIC_ELCR2); } int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) Index: linux-macro-pirq/arch/x86/kernel/apic/io_apic.c =================================================================== --- linux-macro-pirq.orig/arch/x86/kernel/apic/io_apic.c +++ linux-macro-pirq/arch/x86/kernel/apic/io_apic.c @@ -764,7 +764,7 @@ static bool irq_active_low(int idx) static bool EISA_ELCR(unsigned int irq) { if (irq < nr_legacy_irqs()) { - unsigned int port = 0x4d0 + (irq >> 3); + unsigned int port = PIC_ELCR1 + (irq >> 3); return (inb(port) >> (irq & 7)) & 1; } apic_printk(APIC_VERBOSE, KERN_INFO Index: linux-macro-pirq/arch/x86/kernel/apic/vector.c =================================================================== --- linux-macro-pirq.orig/arch/x86/kernel/apic/vector.c +++ linux-macro-pirq/arch/x86/kernel/apic/vector.c @@ -1299,7 +1299,7 @@ static void __init print_PIC(void) pr_debug("... PIC ISR: %04x\n", v); - v = inb(0x4d1) << 8 | inb(0x4d0); + v = inb(PIC_ELCR2) << 8 | inb(PIC_ELCR1); pr_debug("... PIC ELCR: %04x\n", v); } Index: linux-macro-pirq/arch/x86/kernel/i8259.c =================================================================== --- linux-macro-pirq.orig/arch/x86/kernel/i8259.c +++ linux-macro-pirq/arch/x86/kernel/i8259.c @@ -235,15 +235,15 @@ static char irq_trigger[2]; */ static void restore_ELCR(char *trigger) { - outb(trigger[0], 0x4d0); - outb(trigger[1], 0x4d1); + outb(trigger[0], PIC_ELCR1); + outb(trigger[1], PIC_ELCR2); } static void save_ELCR(char *trigger) { /* IRQ 0,1,2,8,13 are marked as reserved */ - trigger[0] = inb(0x4d0) & 0xF8; - trigger[1] = inb(0x4d1) & 0xDE; + trigger[0] = inb(PIC_ELCR1) & 0xF8; + trigger[1] = inb(PIC_ELCR2) & 0xDE; } static void i8259A_resume(void) Index: linux-macro-pirq/arch/x86/kernel/mpparse.c =================================================================== --- linux-macro-pirq.orig/arch/x86/kernel/mpparse.c +++ linux-macro-pirq/arch/x86/kernel/mpparse.c @@ -19,6 +19,7 @@ #include #include +#include #include #include #include @@ -251,7 +252,7 @@ static int __init ELCR_trigger(unsigned { unsigned int port; - port = 0x4d0 + (irq >> 3); + port = PIC_ELCR1 + (irq >> 3); return (inb(port) >> (irq & 7)) & 1; } Index: linux-macro-pirq/arch/x86/pci/irq.c =================================================================== --- linux-macro-pirq.orig/arch/x86/pci/irq.c +++ linux-macro-pirq/arch/x86/pci/irq.c @@ -18,6 +18,7 @@ #include #include +#include #include #include @@ -159,7 +160,7 @@ static void __init pirq_peer_trick(void) void elcr_set_level_irq(unsigned int irq) { unsigned char mask = 1 << (irq & 7); - unsigned int port = 0x4d0 + (irq >> 3); + unsigned int port = PIC_ELCR1 + (irq >> 3); unsigned char val; static u16 elcr_irq_mask;