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Subject: Re: [PATCH 3/6] arm64: dts: ti: k3-j721e: Add support for MCAN nodes
To:     Marc Kleine-Budde <mkl@pengutronix.de>
CC:     <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Lokesh Vutla <lokeshvutla@ti.com>
References: <20210720141642.24999-1-a-govindraju@ti.com>
 <20210720141642.24999-4-a-govindraju@ti.com>
 <20210720145451.6eby7pbfocyyfi4e@pengutronix.de>
From:   Aswath Govindraju <a-govindraju@ti.com>
Message-ID: <41ff222b-e751-1586-b774-4e55bfe5e017@ti.com>
Date:   Wed, 21 Jul 2021 13:18:06 +0530
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Hi Marc,

On 20/07/21 8:24 pm, Marc Kleine-Budde wrote:
> On 20.07.2021 19:46:39, Aswath Govindraju wrote:
>> From: Faiz Abbas <faiz_abbas@ti.com>
>>
>> Add support for 14 MCAN controllers in main domain and 2 MCAN controllers
>> present in mcu domain. All the MCAN controllers support classic CAN
>> messages as well as CAN_FD messages.
>>
>> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
>> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
>> ---
>>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 196 ++++++++++++++++++
>>  .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi      |  28 +++
>>  2 files changed, 224 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> index cf3482376c1e..4215b8e6785a 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> @@ -1940,4 +1940,200 @@
>>  			bus_freq = <1000000>;
>>  		};
>>  	};
>> +
>> +	main_mcan0: can@2701000 {
>> +		compatible = "bosch,m_can";
>> +		reg = <0x00 0x02701000 0x00 0x200>,
>> +		      <0x00 0x02708000 0x00 0x8000>;
>> +		reg-names = "m_can", "message_ram";
>> +		power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
>> +		clocks = <&k3_clks 156 1>, <&k3_clks 156 0>;
>> +		clock-names = "cclk", "hclk";
>> +		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
>> +			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
>> +		interrupt-names = "int0", "int1";
>> +		bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
> 
> Are you intentionally only enabling 1 TX buffer?
> 

I have used this configuration for testing. It can be increased to 32 if
required. Is it better to set it to the maximum number of buffers ?

Thanks,
Aswath

> Marc
>