Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp5310844pxv; Wed, 21 Jul 2021 02:21:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxGKmdXVIq46KgehnrojUT+wTV/tzwbLdGwY3DCa+kzny1jwOnsCzaKsQvi0PKm00Z3TcsS X-Received: by 2002:a92:d943:: with SMTP id l3mr23639740ilq.37.1626859260659; Wed, 21 Jul 2021 02:21:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626859260; cv=none; d=google.com; s=arc-20160816; b=pyTD3H3/XCTflqX3TKCARDA4TqcO2BzbBBJBoB7Rbum/QIjxXzMazggnVecw2+Cd1R fTJxAnnX0Q+lEehn5aNEbBqNLRrMS1qBFh73nWh9JlVIF6b42kKcu4HOEkPm30OV8x33 sbXgs7LNpQE+hB+B/2gIM+tBI9OUWybzwbr7LVLTojkn/iQvCVMRirFLA18jcESDWD4P nFBYZ68kkOK/i4l/MpmHczDSnrznwgXXOYlqDZZFSnGbe4ogpvUDkArrdA9u4lfkdO7M zMrKXVMnUIlVgNietj7BJjc0dkOaYVF561NEHawEn2TvjWXZsXU8uWNt0bMJAuCWcHfT 2e4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Qp7uwiLL41G3P6H/EVeEewjqYAI7Dj2ohOxjqpTDqfw=; b=ecblnzVDJR2X0KZbrDElfmow5fVDHb9GsVtn9aah7vkO66AZz7nQCTFyfieNuzQs2I N6M7hgSExdrxqiqWYNKG0nh2bqNgFPJogPAQ/d6xMxkIAnoWmIqKQ/29/PLKoWnpd8Td xlJ5qlCa0SLcvkCOqehAf1GH1a9eEiUWd3HClhVeIf0X357j1NVGxeDEhXLneHRBnI6l uqbxJJ98SmFjvQV88ZQbSrD/Fr1bfvWe5BAvfVHE/0s9gz0Ql724IzRwxt0yenFspKEe /Fi2J2Z8Ki5+N092WPVymMYkAHgOT7HDZ2rWLO1kfV0JnzOV3miDHz0cGTEzHNJ4wbYk Ov/Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l6si14577758ilg.44.2021.07.21.02.20.48; Wed, 21 Jul 2021 02:21:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237394AbhGUIdW (ORCPT + 99 others); Wed, 21 Jul 2021 04:33:22 -0400 Received: from foss.arm.com ([217.140.110.172]:49234 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236241AbhGUI0s (ORCPT ); Wed, 21 Jul 2021 04:26:48 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B880F1042; Wed, 21 Jul 2021 02:07:25 -0700 (PDT) Received: from e121896.arm.com (unknown [10.57.38.215]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 262ED3F694; Wed, 21 Jul 2021 02:07:23 -0700 (PDT) From: James Clark To: acme@kernel.org, mathieu.poirier@linaro.org, coresight@lists.linaro.org Cc: leo.yan@linaro.org, al.grant@arm.com, suzuki.poulose@arm.com, anshuman.khandual@arm.com, mike.leach@linaro.org, James Clark , John Garry , Will Deacon , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH 2/6] perf cs-etm: Initialise architecture based on TRCIDR1 Date: Wed, 21 Jul 2021 10:07:01 +0100 Message-Id: <20210721090706.21523-3-james.clark@arm.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210721090706.21523-1-james.clark@arm.com> References: <20210721090706.21523-1-james.clark@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently the architecture is hard coded as ARCH_V8, but with the introduction of ETE we want to pick ARCH_AA64. And this change is also applicable to ETM v4.4 onwards as well. Signed-off-by: James Clark --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c index 30889a9d0165..5972a8afcc6b 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -126,6 +126,18 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params, return 0; } +#define TRCIDR1_TRCARCHMIN_SHIFT 4 +#define TRCIDR1_TRCARCHMIN_MASK GENMASK(7, 4) +#define TRCIDR1_TRCARCHMIN(x) (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT) +static enum _ocsd_arch_version cs_etm_decoder__get_arch_ver(u32 reg_idr1) +{ + /* + * If the ETM trace minor version is 4 or more then we can assume + * the architecture is ARCH_AA64 rather than just V8 + */ + return TRCIDR1_TRCARCHMIN(reg_idr1) >= 4 ? ARCH_AA64 : ARCH_V8; +} + static void cs_etm_decoder__gen_etmv4_config(struct cs_etm_trace_params *params, ocsd_etmv4_cfg *config) { @@ -140,7 +152,7 @@ static void cs_etm_decoder__gen_etmv4_config(struct cs_etm_trace_params *params, config->reg_idr11 = 0; config->reg_idr12 = 0; config->reg_idr13 = 0; - config->arch_ver = ARCH_V8; + config->arch_ver = cs_etm_decoder__get_arch_ver(params->etmv4.reg_idr1); config->core_prof = profile_CortexA; } -- 2.28.0