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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Bjorn Helgaas <helgaas@kernel.org>,
        "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc:     Nikolai Zhubr <zhubr.2@gmail.com>, Ingo Molnar <mingo@redhat.com>,
        Borislav Petkov <bp@alien8.de>,
        "H. Peter Anvin" <hpa@zytor.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        "Rafael J. Wysocki" <rjw@rjwysocki.net>,
        Len Brown <len.brown@intel.com>, Pavel Machek <pavel@ucw.cz>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Sean Christopherson <seanjc@google.com>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Wanpeng Li <wanpengli@tencent.com>,
        Jim Mattson <jmattson@google.com>,
        Joerg Roedel <joro@8bytes.org>, x86@kernel.org,
        linux-pci@vger.kernel.org, linux-pm@vger.kernel.org,
        kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/6] x86: PIRQ/ELCR-related fixes and updates
In-Reply-To: <20210721001237.GA144325@bjorn-Precision-5520>
References: <20210721001237.GA144325@bjorn-Precision-5520>
Date:   Wed, 21 Jul 2021 22:41:43 +0200
Message-ID: <87mtqfpfg8.ffs@nanos.tec.linutronix.de>
MIME-Version: 1.0
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Precedence: bulk

On Tue, Jul 20 2021 at 19:12, Bjorn Helgaas wrote:
> On Tue, Jul 20, 2021 at 05:27:43AM +0200, Maciej W. Rozycki wrote:
>> -- a lot of sharing and swizzling here. :)  You'd most definitely need: 
>> <https://lore.kernel.org/patchwork/patch/1454747/> for that though, as I 
>> can't imagine PCI BIOS 2.1 PIRQ routers to commonly enumerate devices 
>> behind PCI-to-PCI bridges, given that they fail to cope with more complex 
>> bus topologies created by option devices in the first place.
>
> Looks nicely done but I have no ability to review or test, so I assume
> the x86 folks will take care of this.

I can review it and pick it up, but for testing I have to rely on the
reporter/submitters.

Thanks,

        tglx