Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp13893pxv; Wed, 21 Jul 2021 14:07:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyFRYdUHRT9/UV9G74xJfTSEW3ijPVX/B/33ZNxDVNsrmPIUkYNC04aa6WjyMc8j+tf1b45 X-Received: by 2002:a05:6e02:dcd:: with SMTP id l13mr25471279ilj.300.1626901527156; Wed, 21 Jul 2021 14:05:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626901527; cv=none; d=google.com; s=arc-20160816; b=Fv9gIxTrG6sQ5wIJOZIbRnuKBSBQfrcuSXWRa2ddJB+QrWue2p+ivUKY6kqZI3BlJW QxvS03jkOiAzIsx6eNLZ8JipuZsmqMqNZp6hMQ2bODq9skm3oh6ZKb3GyZfjCLHGAie0 GbeE8sim2hBwYoJrRh3FT9YUq0/lqCXkrg9GYmrTx83xCfx4Laf/xP6FB88ek/PaG0ag 1n83QOeRhDte1quJmJnXWW5BtuLQVG1TktERwxE56YpFa8V8p/uDJOVevEIssZbEuBKj 3/AZV7F4G/Iq26Wb5B2J97MTZYGGzYhGuxym1gmKwYrXiesAs59TasbmuuimtH4UzEmA rBHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=G5AzMp6mVRwUmPTeQkOrvTNiTpoVgg2+LTf1q8pEH1M=; b=Q9l6WeBjp9+fLEjACakjkMdoN/D+wM1gSwBbduYOgB3nB0Jn2F4Tu4u22BGjYNm+Ov BmaGxiB/uIsk2r+YI9SrNo+MFvVafSGJ6mHQ6RKvUtdDaYgwTF/Isa/7yp0s1vIkdzPu CsIR1SHHbXVHkyWwIbbwoxPyFnTMhkKTm2+WqCjmZ81qyhzRA/sJZ7wLTFHkff4FD3C8 LxrGqIjLi+HoDv+bwPMEinEZ6tYGai3AdJi6Xah8di4eU1y5av2tr5wi4eUbPiYW91cq TYkAk8R0YOCbo97zHyg7AHOFEz9AgMvDCrRZHjHtSnm09VI+weuxTaIIUQafZD9A8rue 2TBQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u26si29794774jam.87.2021.07.21.14.05.15; Wed, 21 Jul 2021 14:05:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239585AbhGUSft (ORCPT + 99 others); Wed, 21 Jul 2021 14:35:49 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:8146 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S239580AbhGUSfm (ORCPT ); Wed, 21 Jul 2021 14:35:42 -0400 X-IronPort-AV: E=Sophos;i="5.84,258,1620658800"; d="scan'208";a="88348864" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 22 Jul 2021 04:16:17 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 750A4400D0FA; Thu, 22 Jul 2021 04:16:15 +0900 (JST) From: Lad Prabhakar To: Geert Uytterhoeven , Rob Herring , Linus Walleij , Magnus Damm , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH v3 3/4] arm64: dts: renesas: r9a07g044: Add pinctrl node Date: Wed, 21 Jul 2021 20:15:57 +0100 Message-Id: <20210721191558.22484-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210721191558.22484-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20210721191558.22484-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add GPIO/pinctrl node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 01482d227506..17afb4bb6261 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -111,6 +111,19 @@ status = "disabled"; }; + pinctrl: pin-controller@11030000 { + compatible = "renesas,r9a07g044-pinctrl"; + reg = <0 0x11030000 0 0x10000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 392>; + clocks = <&cpg CPG_MOD R9A07G044_GPIO_HCLK>; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_GPIO_RSTN>, + <&cpg R9A07G044_GPIO_PORT_RESETN>, + <&cpg R9A07G044_GPIO_SPARE_RESETN>; + }; + gic: interrupt-controller@11900000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; -- 2.17.1