Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp262993pxv; Wed, 21 Jul 2021 22:36:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxmyms43zH1FYPnpmLNR5sNVfRWFMa1nVCcBV5dAWAgAWDW3ruaG9ciS98OQOTy0u8CWF97 X-Received: by 2002:a05:6402:312d:: with SMTP id dd13mr51784169edb.348.1626932180795; Wed, 21 Jul 2021 22:36:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626932180; cv=none; d=google.com; s=arc-20160816; b=i3a9flBTQqSVG54EKghE9QAKPnyaqqPMRfwzVEI/KQbu4BQYjilKJBlqzKK7AQnao0 5QHBczSwhnvAWIS2IyEVvTqQ0NOY7NALgjfA36P66+wyfr5xpJ1mGYDG5Gtf9ofG0nhS u2kS9mDibs5tdK75kFzRlrr73n2XDdOlHbz2sd2KQbItNsFmoEEiz7ems2ZJDMbe2wDP tWj0A9LkKnAUVVxAtjwjJD5C6syYJOZHrXPkXgaMVfZfRhpPDT4Pgxr7Kh9lt2gBVCUP mOPsiz6fls8M0/xL9mYRZaMbm8FapgYZ93JjLBMPRDmHTicKnoQ2kW5p8AjHprqB5hMn lXTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=V1CxDAWhJqje17Whm8DvbqwZKgDjWCi2szXS3+ExJCE=; b=PKE/di+pne9qSm0wXAkdPSJIU89QxQRYT1pDFwwlvzjv1VmsowPYVr55lT0uu0V5OV vRV9k1d9xnXNSLMAE+PY8Lfr+lgVzXkWyJ5/1Tqvh1gMeCi0H8/++Jec7omIE5MCUvc3 ba5gymXzu6xGnHX51nbokzYTfRImxU7yIAyNO/jxFH8kFKzgVG4TFmx66GiQMuNgNWIo l9xbACIbgu5p7JQ/IsbTLME7w8Qyx9E6081qsqMrL4GsnDkI02C9MvWDHN3lMTAZYjUP or+/AK+qjkRDKbIGfbe7dq1QRNQZrAyrq2GlfBDc1xyO0UmH2V56vcoH6j+QR7VthEJi l2qg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nc37si30739958ejc.202.2021.07.21.22.35.57; Wed, 21 Jul 2021 22:36:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230021AbhGVEyE (ORCPT + 99 others); Thu, 22 Jul 2021 00:54:04 -0400 Received: from mga05.intel.com ([192.55.52.43]:49349 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229529AbhGVEyB (ORCPT ); Thu, 22 Jul 2021 00:54:01 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10052"; a="297132153" X-IronPort-AV: E=Sophos;i="5.84,260,1620716400"; d="scan'208";a="297132153" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jul 2021 22:34:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,260,1620716400"; d="scan'208";a="632868433" Received: from ubuntu18.png.intel.com ([10.88.229.69]) by orsmga005.jf.intel.com with ESMTP; 21 Jul 2021 22:34:33 -0700 From: nandhini.srikandan@intel.com To: fancer.lancer@gmail.com, broonie@kernel.org, robh+dt@kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, mgross@linux.intel.com, kris.pan@intel.com, kenchappa.demakkanavar@intel.com, furong.zhou@intel.com, mallikarjunappa.sangannavar@intel.com, mahesh.r.vaidya@intel.com, nandhini.srikandan@intel.com, rashmi.a@intel.com Subject: =?utf-8?q?=5B=E2=80=9CPATCH=E2=80=9D=200/2=5D=20Add=20support=20for=20Intel=20Thunder=20Bay=20SPI?= Date: Thu, 22 Jul 2021 13:33:56 +0800 Message-Id: <20210722053358.29682-1-nandhini.srikandan@intel.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Nandhini Srikandan Hi, This patch set enables the support for Designware SPI on the Intel Thunder Bay SoC. Patch 1: SPI DT bindings for Intel Thunder Bay SoC Patch 2: Adds support for Designware SPI on Intel Thunderbay SoC Please help to review this patch set. Thanks & Regards, Nandhini Nandhini Srikandan (2): dt-bindings: spi: Add bindings for Intel Thunder Bay SoC spi: dw: Add support for Intel Thunder Bay SPI .../bindings/spi/snps,dw-apb-ssi.yaml | 2 ++ drivers/spi/spi-dw-core.c | 6 ++++++ drivers/spi/spi-dw-mmio.c | 20 +++++++++++++++++++ drivers/spi/spi-dw.h | 15 ++++++++++++++ 4 files changed, 43 insertions(+) -- 2.17.1