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Peter Anvin" , Mark Brown , Dave Martin , Ard Biesheuvel Subject: [PATCH 2/3] x86/fpu: Make FPU protection reuse common helper Date: Thu, 22 Jul 2021 18:51:56 +0100 Message-Id: <20210722175157.1367122-3-valentin.schneider@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210722175157.1367122-1-valentin.schneider@arm.com> References: <20210722175157.1367122-1-valentin.schneider@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The newly-introduced preempt_{enable, disable}_bh() helpers are an exact stand-in for fpregs_{lock, unlock}(). Use them there. No change in behaviour intended. Signed-off-by: Valentin Schneider --- arch/x86/include/asm/fpu/api.h | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h index 62cf3e4c06fb..ffebb9316bfd 100644 --- a/arch/x86/include/asm/fpu/api.h +++ b/arch/x86/include/asm/fpu/api.h @@ -54,31 +54,16 @@ static inline void kernel_fpu_begin(void) * fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in * a random state. * - * local_bh_disable() protects against both preemption and soft interrupts - * on !RT kernels. - * - * On RT kernels local_bh_disable() is not sufficient because it only - * serializes soft interrupt related sections via a local lock, but stays - * preemptible. Disabling preemption is the right choice here as bottom - * half processing is always in thread context on RT kernels so it - * implicitly prevents bottom half processing as well. - * * Disabling preemption also serializes against kernel_fpu_begin(). */ static inline void fpregs_lock(void) { - if (!IS_ENABLED(CONFIG_PREEMPT_RT)) - local_bh_disable(); - else - preempt_disable(); + preempt_disable_bh(); } static inline void fpregs_unlock(void) { - if (!IS_ENABLED(CONFIG_PREEMPT_RT)) - local_bh_enable(); - else - preempt_enable(); + preempt_enable_bh(); } #ifdef CONFIG_X86_DEBUG_FPU -- 2.25.1