Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp1301951pxv; Fri, 23 Jul 2021 05:11:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzhvZ8C/u9cxP44SDAN7Nv8iQzx5qAPChtOG/WGibxdIkBTvoU+3JzfQz1Kwo2KPwW4Xpuo X-Received: by 2002:a05:6402:207b:: with SMTP id bd27mr5118469edb.195.1627042287222; Fri, 23 Jul 2021 05:11:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627042287; cv=none; d=google.com; s=arc-20160816; b=ztwxsiRrCYZXErFnEMGY0+C+HS93bqyDyNzVQLVUOyXJvmf95pvD1VTT2lRjqGNdHI AJJwqa0/i3cPZJ8Fx3V8t47YU+v1k+xiAMfgxGSApejW7NdE4yIUDLw3njPgPD4qOBEW JOp7sgrljLzBUjG7ZDygJs+aFb4GXcaALNL1JMUBgt3X7tPBrz2bx5KqW8qfx3FfIu6E 7yGRzOAu9X/wlgYN3KX2ame9Qfm2Oc1NtGgvDQGD0HTkLn7UrCaxlnfOdJ1jwvGsdCEL 5UjmnBOcshuNHd5qwODpG26Us+EBF67KuwU2pEtU6EDWPAxa/nUpGE3DxfAk1JPnkq1B PH9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=fbOnMORV4Sz3OlZhxqIYcNsyMa4qumEdf8h8Z5yImNo=; b=zHB8DVvboQM1PEt1TjjaDSfdfGeljaUUbNvv9iTVKHtyZiFG4/CsDv04jNgmdz5aK7 6bREKFViUm23qr5Js7wQAz/JKbG4WPFo9x+R/eh/xBJZa3d4PEzv0JhcSuz/9GkeEppT QdZ6DGWUsN1IKaAiA+iVqtClnzp9jsQ8Y14L3bE2Y9PBcGqSDQgy0VEYnMOo6Q8fu0LX 0BW81AitljfzQkpzLbhfpQx3fmRD0/HhQM+iNMToPKmDmX2GvuRbz92N9+6aIrNubbu4 EvmITTF1JBmENEH+34uoQeUV/VMudL85pt8exQbj9MRiShVte70bW1Rc53XTbCZj5nas e54g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ee38si11893375edb.225.2021.07.23.05.11.01; Fri, 23 Jul 2021 05:11:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234601AbhGWL26 (ORCPT + 99 others); Fri, 23 Jul 2021 07:28:58 -0400 Received: from foss.arm.com ([217.140.110.172]:45100 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234385AbhGWL25 (ORCPT ); Fri, 23 Jul 2021 07:28:57 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 50B60D6E; Fri, 23 Jul 2021 05:09:30 -0700 (PDT) Received: from [10.57.33.208] (unknown [10.57.33.208]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 120B53F694; Fri, 23 Jul 2021 05:09:27 -0700 (PDT) Subject: Re: [PATCH 3/6] perf cs-etm: Save TRCDEVARCH register To: Mike Leach Cc: Arnaldo Carvalho de Melo , Mathieu Poirier , Coresight ML , Leo Yan , Al Grant , "Suzuki K. Poulose" , Anshuman Khandual , John Garry , Will Deacon , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel , Linux Kernel Mailing List , linux-perf-users@vger.kernel.org References: <20210721090706.21523-1-james.clark@arm.com> <20210721090706.21523-4-james.clark@arm.com> From: James Clark Message-ID: <84e9e6ba-7903-d2d9-f09d-ba7a1a4332a9@arm.com> Date: Fri, 23 Jul 2021 13:09:26 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/07/2021 10:48, Mike Leach wrote: > HI James, > > On Wed, 21 Jul 2021 at 10:07, James Clark wrote: >> >> Now that the metadata has a length field we can add extra registers >> without breaking any previous versions of perf. >> >> Save the TRCDEVARCH register so that it can be used to configure the ETE >> decoder in the next commit. If the sysfs file doesn't exist then 0 will >> be saved which is an impossible register value and can also be used to >> signify that the file couldn't be read. >> >> Signed-off-by: James Clark >> --- >> tools/perf/arch/arm/util/cs-etm.c | 13 ++++++++++++- >> tools/perf/util/cs-etm.c | 1 + >> tools/perf/util/cs-etm.h | 5 +++-- >> 3 files changed, 16 insertions(+), 3 deletions(-) >> >> diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c >> index 85168d87b2d7..65a863bdf5cc 100644 >> --- a/tools/perf/arch/arm/util/cs-etm.c >> +++ b/tools/perf/arch/arm/util/cs-etm.c >> @@ -53,6 +53,7 @@ static const char *metadata_etmv4_ro[CS_ETMV4_PRIV_MAX] = { >> [CS_ETMV4_TRCIDR2] = "trcidr/trcidr2", >> [CS_ETMV4_TRCIDR8] = "trcidr/trcidr8", >> [CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus", >> + [CS_ETE_TRCDEVARCH] = "mgmt/trcdevarch" >> }; >> >> static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu); >> @@ -73,7 +74,7 @@ static int cs_etm_set_context_id(struct auxtrace_record *itr, >> if (!cs_etm_is_etmv4(itr, cpu)) >> goto out; >> >> - /* Get a handle on TRCIRD2 */ >> + /* Get a handle on TRCIDR2 */ >> snprintf(path, PATH_MAX, "cpu%d/%s", >> cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]); >> err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val); >> @@ -643,6 +644,16 @@ static void cs_etm_get_metadata(int cpu, u32 *offset, >> cs_etm_get_ro(cs_etm_pmu, cpu, >> metadata_etmv4_ro >> [CS_ETMV4_TRCAUTHSTATUS]); >> + /* >> + * ETE uses the same registers as ETMv4 plus TRCDEVARCH. It's also backwards >> + * compatible, so don't change the magic number otherwise that will reduce the >> + * number of versions of perf that can open it. Just append TRCDEVARCH to the end of >> + * the register block and allow newer versions of perf to make use. cs_etm_get_ro() >> + * returns 0 if it couldn't be read. >> + */ > > ETE is a superset of ETMv4, but an old perf that only knows ETMv4 > cannot be guaranteed to decode all ETE due to new packet types. > Therefore do we want to allow old perfs to decode only some ETE, > possibly with errors? > > I think it would be better to add in a new magic number for the new > decoder rather than have some grey overlap area were an "older" perf > might work intermittently dependent on the packets generated in a > particular trace run. I did think about doing it this way and I'm also ok with adding a new magic number. I will wait till Al's back to get his opinion before making the change. Thanks James > > Regards > > Mike > >> + info->priv[*offset + CS_ETE_TRCDEVARCH] = >> + cs_etm_get_ro(cs_etm_pmu, cpu, >> + metadata_etmv4_ro[CS_ETE_TRCDEVARCH]); >> >> /* How much space was used */ >> increment = CS_ETMV4_PRIV_MAX; >> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c >> index 62769a84a53f..68978f6707a8 100644 >> --- a/tools/perf/util/cs-etm.c >> +++ b/tools/perf/util/cs-etm.c >> @@ -2508,6 +2508,7 @@ static const char * const cs_etmv4_priv_fmts[] = { >> [CS_ETMV4_TRCIDR2] = " TRCIDR2 %llx\n", >> [CS_ETMV4_TRCIDR8] = " TRCIDR8 %llx\n", >> [CS_ETMV4_TRCAUTHSTATUS] = " TRCAUTHSTATUS %llx\n", >> + [CS_ETE_TRCDEVARCH] = " TRCDEVARCH %llx\n" >> }; >> >> static const char * const param_unk_fmt = >> diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h >> index d65c7b19407d..52d82dce9d59 100644 >> --- a/tools/perf/util/cs-etm.h >> +++ b/tools/perf/util/cs-etm.h >> @@ -59,7 +59,7 @@ enum { >> /* define fixed version 0 length - allow new format reader to read old files. */ >> #define CS_ETM_NR_TRC_PARAMS_V0 (CS_ETM_ETMIDR - CS_ETM_ETMCR + 1) >> >> -/* ETMv4 metadata */ >> +/* ETMv4 + ETE metadata */ >> enum { >> /* Dynamic, configurable parameters */ >> CS_ETMV4_TRCCONFIGR = CS_ETM_COMMON_BLK_MAX_V1, >> @@ -70,7 +70,8 @@ enum { >> CS_ETMV4_TRCIDR2, >> CS_ETMV4_TRCIDR8, >> CS_ETMV4_TRCAUTHSTATUS, >> - CS_ETMV4_PRIV_MAX, >> + CS_ETE_TRCDEVARCH, >> + CS_ETMV4_PRIV_MAX >> }; >> >> /* define fixed version 0 length - allow new format reader to read old files. */ >> -- >> 2.28.0 >> > >