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Date:   Sun, 25 Jul 2021 14:14:22 +0200
From:   Pali =?utf-8?B?Um9ow6Fy?= <pali@kernel.org>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Gregory Clement <gregory.clement@bootlin.com>,
        Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
        Vladimir Vid <vladimir.vid@sartura.hr>,
        Marek =?utf-8?B?QmVow7pu?= <kabel@kernel.org>,
        Geert Uytterhoeven <geert@linux-m68k.org>,
        linux-clk@vger.kernel.org, linux-serial@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/5] serial: mvebu-uart: implement UART clock driver
 for configuring UART base clock
Message-ID: <20210725121422.26agyztfrsrn43xg@pali>
References: <20210624224909.6350-1-pali@kernel.org>
 <20210717123829.5201-1-pali@kernel.org>
 <20210717123829.5201-3-pali@kernel.org>
 <YPMS24faTg9tqreR@lunn.ch>
 <20210717180540.ersg5bslik6ivjie@pali>
 <20210724094816.2y3peclaftx26kwj@pali>
 <YPxA3Zcfw8ZPNYZp@lunn.ch>
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On Saturday 24 July 2021 18:33:33 Andrew Lunn wrote:
> On Sat, Jul 24, 2021 at 11:48:16AM +0200, Pali Rohár wrote:
> > On Saturday 17 July 2021 20:05:40 Pali Rohár wrote:
> > > On Saturday 17 July 2021 19:26:51 Andrew Lunn wrote:
> > > > On Sat, Jul 17, 2021 at 02:38:26PM +0200, Pali Rohár wrote:
> > > > > @@ -445,6 +472,7 @@ static void mvebu_uart_shutdown(struct uart_port *port)
> > > > >  static int mvebu_uart_baud_rate_set(struct uart_port *port, unsigned int baud)
> > > > >  {
> > > > >  	unsigned int d_divisor, m_divisor;
> > > > > +	unsigned long flags;
> > > > >  	u32 brdv, osamp;
> > > > >  
> > > > >  	if (!port->uartclk)
> > > > > @@ -463,10 +491,12 @@ static int mvebu_uart_baud_rate_set(struct uart_port *port, unsigned int baud)
> > > > >  	m_divisor = OSAMP_DEFAULT_DIVISOR;
> > > > >  	d_divisor = DIV_ROUND_CLOSEST(port->uartclk, baud * m_divisor);
> > > > >  
> > > > > +	spin_lock_irqsave(&mvebu_uart_lock, flags);
> > > > 
> > > > Hi Pali
> > > > 
> > > > You only need spin_lock_irqsave() if you plan on taking the spinlock
> > > > in an interrupt handler. It seems unlikely the baud rate will be
> > > > changed in interrupt context? Please check, and then swap to plain
> > > > spin_lock().
> > > 
> > > Hello! Ok, I will check it.
> > 
> > Well, driver is already using spin_lock_irqsave() in all other
> > functions.
> 
> And some of those functions are called from interrupt context i
> expect. For each lock you have, you need to decide if interrupt
> context is an issue or not. spin_lock_irqsave() is more expansive,
> since it has to disable interrupts, etc. It can upset real time
> latency etc. So in the hot path, you want to try to avoid it, unless
> you actually need it. But changing the baud rate is not the hot path,
> it hardly every happens, so we can live with the unneeded overhead.

It happens either one time during "device" probing (e.g. when connected
bluetooth UART device want to use higher baudrate) or when user
explicitly ask to change baudrate (e.g. when want to transfer files over
UART via x/y/z-modem / kermit protocol). Or maybe if somebody wants to
establish and use PPP network over UART. So it should not be a problem.

> > And in linux/clk-provider.h is documented that drivers can call
> > clk_enable() from an interrupt, so it means that spin_lock_irqsave() is
> > really needed for mvebu_uart_lock.
> 
> Sure, drivers can. But in this case, does a driver actually do that?
> Does it change the baud rate in interrupt context?

Looks like that changing baudrate not. But other places where this lock
is used (e.g. in clk callbacks) can be called from interrupt context.

But for baudrate change, I think it is not so common action, so there
should not be issue with slightly higher overhead.

> > > In other patches is updated function mvebu_uart_set_termios() which
> > > verifies that you can set particular baudrate.
> 
> Great. It is not clear from the patches or the commit message that
> this has been considered. It is something worth mentioning, just to
> avoid questions.

This check was there also prior my patches. I only "extended" it to
match what is supported by this patch series.

> > > Also note that all A3720 boards have disabled UART2 in DTS. And I'm not
> > > sure if there is somebody who uses UART2 or who uses both UARTs.
> 
> That does not really matter. You should not regression a feature
> because you think nobody is using it.

I know. That is why I introduced code which recalculates divisors
registers to not change baudrate of UART2 during loading of UART1 and
also introduction of this clk subdriver with locks to prevent any
regressions.