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([2001:861:44c0:66c0:32b6:aa71:d2df:4f1d]) by smtp.gmail.com with ESMTPSA id r19sm43916628wrr.32.2021.07.26.01.00.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Jul 2021 01:00:09 -0700 (PDT) Subject: Re: [PATCH v2 1/2] ARM: dts: meson: Add the AIU audio controller To: Martin Blumenstingl , linux-amlogic@lists.infradead.org Cc: khilman@baylibre.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20210717233030.331273-1-martin.blumenstingl@googlemail.com> <20210717233030.331273-2-martin.blumenstingl@googlemail.com> From: Neil Armstrong Organization: Baylibre Message-ID: <48116849-8a76-7048-2d71-9a2853db94b5@baylibre.com> Date: Mon, 26 Jul 2021 10:00:08 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210717233030.331273-2-martin.blumenstingl@googlemail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18/07/2021 01:30, Martin Blumenstingl wrote: > Add the AIU audio controller to the Amlogic Meson6/8/8b/8m2 SoC DT. This > provides I2S and SPDIF outputs as well as codec glues for the internal > HDMI controller. > Also add the clock inputs and pin mux definitions on Meson8/8b/8m2. On > Meson6 this is omitted because we neither have a clock nor pin > controller node there yet. > > Signed-off-by: Martin Blumenstingl > --- > arch/arm/boot/dts/meson.dtsi | 12 +++++++ > arch/arm/boot/dts/meson8.dtsi | 63 ++++++++++++++++++++++++++++++++++ > arch/arm/boot/dts/meson8b.dtsi | 63 ++++++++++++++++++++++++++++++++++ > 3 files changed, 138 insertions(+) > > diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi > index bd0e864964e9..3be7cba603d5 100644 > --- a/arch/arm/boot/dts/meson.dtsi > +++ b/arch/arm/boot/dts/meson.dtsi > @@ -5,6 +5,7 @@ > > #include > #include > +#include > > / { > #address-cells = <1>; > @@ -36,6 +37,17 @@ hhi: system-controller@4000 { > reg = <0x4000 0x400>; > }; > > + aiu: audio-controller@5400 { > + compatible = "amlogic,aiu"; > + #sound-dai-cells = <2>; > + sound-name-prefix = "AIU"; > + reg = <0x5400 0x2ac>; > + interrupts = , > + ; > + interrupt-names = "i2s", "spdif"; > + status = "disabled"; > + }; > + > assist: assist@7c00 { > compatible = "amlogic,meson-mx-assist", "syscon"; > reg = <0x7c00 0x200>; > diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi > index 686c7b7c79d5..f80ddc98d3a2 100644 > --- a/arch/arm/boot/dts/meson8.dtsi > +++ b/arch/arm/boot/dts/meson8.dtsi > @@ -317,6 +317,29 @@ mali: gpu@c0000 { > }; > }; /* end of / */ > > +&aiu { > + compatible = "amlogic,aiu-meson8", "amlogic,aiu"; > + clocks = <&clkc CLKID_AIU_GLUE>, > + <&clkc CLKID_I2S_OUT>, > + <&clkc CLKID_AOCLK_GATE>, > + <&clkc CLKID_CTS_AMCLK>, > + <&clkc CLKID_MIXER_IFACE>, > + <&clkc CLKID_IEC958>, > + <&clkc CLKID_IEC958_GATE>, > + <&clkc CLKID_CTS_MCLK_I958>, > + <&clkc CLKID_CTS_I958>; > + clock-names = "pclk", > + "i2s_pclk", > + "i2s_aoclk", > + "i2s_mclk", > + "i2s_mixer", > + "spdif_pclk", > + "spdif_aoclk", > + "spdif_mclk", > + "spdif_mclk_sel"; > + resets = <&reset RESET_AIU>; > +}; > + > &aobus { > pmu: pmu@e0 { > compatible = "amlogic,meson8-pmu", "syscon"; > @@ -340,6 +363,38 @@ gpio_ao: ao-bank@14 { > gpio-ranges = <&pinctrl_aobus 0 0 16>; > }; > > + i2s_am_clk_pins: i2s-am-clk-out { > + mux { > + groups = "i2s_am_clk_out_ao"; > + function = "i2s_ao"; > + bias-disable; > + }; > + }; > + > + i2s_out_ao_clk_pins: i2s-ao-clk-out { > + mux { > + groups = "i2s_ao_clk_out_ao"; > + function = "i2s_ao"; > + bias-disable; > + }; > + }; > + > + i2s_out_lr_clk_pins: i2s-lr-clk-out { > + mux { > + groups = "i2s_lr_clk_out_ao"; > + function = "i2s_ao"; > + bias-disable; > + }; > + }; > + > + i2s_out_ch01_ao_pins: i2s-out-ch01 { > + mux { > + groups = "i2s_out_ch01_ao"; > + function = "i2s_ao"; > + bias-disable; > + }; > + }; > + > uart_ao_a_pins: uart_ao_a { > mux { > groups = "uart_tx_ao_a", "uart_rx_ao_a"; > @@ -460,6 +515,14 @@ mux { > }; > }; > > + spdif_out_pins: spdif-out { > + mux { > + groups = "spdif_out"; > + function = "spdif"; > + bias-disable; > + }; > + }; > + > spi_nor_pins: nor { > mux { > groups = "nor_d", "nor_q", "nor_c", "nor_cs"; > diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi > index c02b03cbcdf4..b49b7cbaed4e 100644 > --- a/arch/arm/boot/dts/meson8b.dtsi > +++ b/arch/arm/boot/dts/meson8b.dtsi > @@ -279,6 +279,29 @@ mali: gpu@c0000 { > }; > }; /* end of / */ > > +&aiu { > + compatible = "amlogic,aiu-meson8b", "amlogic,aiu"; > + clocks = <&clkc CLKID_AIU_GLUE>, > + <&clkc CLKID_I2S_OUT>, > + <&clkc CLKID_AOCLK_GATE>, > + <&clkc CLKID_CTS_AMCLK>, > + <&clkc CLKID_MIXER_IFACE>, > + <&clkc CLKID_IEC958>, > + <&clkc CLKID_IEC958_GATE>, > + <&clkc CLKID_CTS_MCLK_I958>, > + <&clkc CLKID_CTS_I958>; > + clock-names = "pclk", > + "i2s_pclk", > + "i2s_aoclk", > + "i2s_mclk", > + "i2s_mixer", > + "spdif_pclk", > + "spdif_aoclk", > + "spdif_mclk", > + "spdif_mclk_sel"; > + resets = <&reset RESET_AIU>; > +}; > + > &aobus { > pmu: pmu@e0 { > compatible = "amlogic,meson8b-pmu", "syscon"; > @@ -302,6 +325,46 @@ gpio_ao: ao-bank@14 { > gpio-ranges = <&pinctrl_aobus 0 0 16>; > }; > > + i2s_am_clk_pins: i2s-am-clk-out { > + mux { > + groups = "i2s_am_clk_out"; > + function = "i2s"; > + bias-disable; > + }; > + }; > + > + i2s_out_ao_clk_pins: i2s-ao-clk-out { > + mux { > + groups = "i2s_ao_clk_out"; > + function = "i2s"; > + bias-disable; > + }; > + }; > + > + i2s_out_lr_clk_pins: i2s-lr-clk-out { > + mux { > + groups = "i2s_lr_clk_out"; > + function = "i2s"; > + bias-disable; > + }; > + }; > + > + i2s_out_ch01_ao_pins: i2s-out-ch01 { > + mux { > + groups = "i2s_out_01"; > + function = "i2s"; > + bias-disable; > + }; > + }; > + > + spdif_out_1_pins: spdif-out-1 { > + mux { > + groups = "spdif_out_1"; > + function = "spdif_1"; > + bias-disable; > + }; > + }; > + > uart_ao_a_pins: uart_ao_a { > mux { > groups = "uart_tx_ao_a", "uart_rx_ao_a"; > Reviewed-by: Neil Armstrong