Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp3420368pxv; Mon, 26 Jul 2021 03:58:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxzmUbeY69sXlrtnO7rH0324T9KoaE4nLx7+LJGq2+UCTaB0S+4khQRIBiRBF3npAqm9rtW X-Received: by 2002:a92:a013:: with SMTP id e19mr12533669ili.206.1627297134097; Mon, 26 Jul 2021 03:58:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627297134; cv=none; d=google.com; s=arc-20160816; b=h0+K2d+fhO2E4PL+iuhpabIAcaKYoO1AUETB44DZaUetqKiy6dxDrIMDASTbemTnUD QXLmQCbh2DvEVUOYQIquefPQMcmEaqoj6hBDpqdK60peFPEdYlcjMhr9oEUGueDVkOd0 hOWSdswg5ZCFJDVQVEyowzXDqInE5S3VEh/tk4GBOmNKiVBBDLYGPfrwmfFXdACy6mdP 8eT2OXcbwgb09wRiGcvmDDsqyZi5RvYewD1v54Ox6glWviG6ALhyNaww8zyVyHJhyxDJ zj09fgvOsJZ76lB8RAMBaeQL+WKyGuzjtkJ77tbOfMx0YNx85S9WZ44IYpgvUQg2cXoU NcXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=GkzQN/1gJYAWJIL+hQuSZuAGKRNrcXbFziiaEWKwMX4=; b=Mm2BopsACwPjqcK0UZmVlm5YcUUB663gji80+oW5W7WpuVzAYxhaS/ksZwWR+JR8rE wQsL2VDepVISy/NLcISxkiBobnVUoQaFRWMv2S+/JF5KEVHIBTJqzyk/1cvRC1Sj1BqG gKmU9eNzl8USOcNMlr8/Zlvg2LYUyZ1VOQJlOH6xbbPu5xHDJU6dI3R8QFSaPvVeM/aD V798sY2OzExUJQhSTzUCw4xvbIzKahynUZZFybN1p4MtY97zFQZa1Xj8qnBNO4zW8OiX P/4NED2mX9d5+evVOJqsGUFNII+vxbzjgaFh2UoHDmXQhuymKGENqASKr9olGKHbMBdk PS9Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f16si15388058ilc.93.2021.07.26.03.58.40; Mon, 26 Jul 2021 03:58:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233161AbhGZKRX (ORCPT + 99 others); Mon, 26 Jul 2021 06:17:23 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:34372 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233006AbhGZKRW (ORCPT ); Mon, 26 Jul 2021 06:17:22 -0400 X-UUID: 71d6761c479846b2a81d8a668b12b457-20210726 X-UUID: 71d6761c479846b2a81d8a668b12b457-20210726 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1282447663; Mon, 26 Jul 2021 18:57:47 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 26 Jul 2021 18:57:45 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 26 Jul 2021 18:57:45 +0800 From: Chun-Jie Chen To: Matthias Brugger , Stephen Boyd , Nicolas Boichat , Rob Herring CC: , , , , , , , Chun-Jie Chen Subject: [v14 02/21] dt-bindings: ARM: Mediatek: Add mmsys document binding for MT8192 Date: Mon, 26 Jul 2021 18:57:00 +0800 Message-ID: <20210726105719.15793-3-chun-jie.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210726105719.15793-1-chun-jie.chen@mediatek.com> References: <20210726105719.15793-1-chun-jie.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the mmsys document binding for MT8192 SoC. Signed-off-by: Chun-Jie Chen Reviewed-by: Chun-Kuang Hu Reviewed-by: Matthias Brugger Acked-by: Rob Herring --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index 78c50733985c..9712a6831fab 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -16,6 +16,7 @@ Required Properties: - "mediatek,mt8167-mmsys", "syscon" - "mediatek,mt8173-mmsys", "syscon" - "mediatek,mt8183-mmsys", "syscon" + - "mediatek,mt8192-mmsys", "syscon" - #clock-cells: Must be 1 For the clock control, the mmsys controller uses the common clk binding from -- 2.18.0