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Date:   Tue, 27 Jul 2021 08:06:27 +0000
To:     linux-arm-msm@vger.kernel.org, Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>
From:   Yassine Oudjana <y.oudjana@protonmail.com>
Cc:     Yassine Oudjana <y.oudjana@protonmail.com>,
        devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
        linux-kernel@vger.kernel.org
Reply-To: Yassine Oudjana <y.oudjana@protonmail.com>
Subject: [PATCH] arm64: dts: qcom: msm8996: Add blsp2_i2c3
Message-ID: <6qg4HkrclPyAcIF0MUN7hNVjz9VdppvGD8GeT2k@cp3-web-029.plabs.ch>
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Add a node for blsp2_i2c3 which is used for type-C port control chips
and speaker codecs on some devices.
  =20
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 32 +++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qc=
om/msm8996.dtsi
index 044db4ad2f3e..0cde4b7f863e 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1340,6 +1340,20 @@ blsp2_uart3_4pins_sleep: blsp2-uart2-4pins-sleep {
 =09=09=09=09bias-disable;
 =09=09=09};
=20
+=09=09=09blsp2_i2c3_default: blsp2-i2c3 {
+=09=09=09=09pins =3D "gpio51", "gpio52";
+=09=09=09=09function =3D "blsp_i2c9";
+=09=09=09=09drive-strength =3D <16>;
+=09=09=09=09bias-disable;
+=09=09=09};
+
+=09=09=09blsp2_i2c3_sleep: blsp2-i2c3-sleep {
+=09=09=09=09pins =3D "gpio51", "gpio52";
+=09=09=09=09function =3D "gpio";
+=09=09=09=09drive-strength =3D <2>;
+=09=09=09=09bias-disable;
+=09=09=09};
+
 =09=09=09wcd_intr_default: wcd-intr-default{
 =09=09=09=09pins =3D "gpio54";
 =09=09=09=09function =3D "gpio";
@@ -3023,6 +3037,24 @@ blsp2_i2c2: i2c@75b6000 {
 =09=09=09status =3D "disabled";
 =09=09};
=20
+=09=09blsp2_i2c3: i2c@75b7000 {
+=09=09=09compatible =3D "qcom,i2c-qup-v2.2.1";
+=09=09=09reg =3D <0x075b7000 0x1000>;
+=09=09=09interrupts =3D <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+=09=09=09clocks =3D <&gcc GCC_BLSP2_AHB_CLK>,
+=09=09=09=09<&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>;
+=09=09=09clock-names =3D "iface", "core";
+=09=09=09clock-frequency =3D <400000>;
+=09=09=09pinctrl-names =3D "default", "sleep";
+=09=09=09pinctrl-0 =3D <&blsp2_i2c3_default>;
+=09=09=09pinctrl-1 =3D <&blsp2_i2c3_sleep>;
+=09=09=09dmas =3D <&blsp2_dma 16>, <&blsp2_dma 17>;
+=09=09=09dma-names =3D "tx", "rx";
+=09=09=09#address-cells =3D <1>;
+=09=09=09#size-cells =3D <0>;
+=09=09=09status =3D "disabled";
+=09=09};
+
 =09=09blsp2_i2c5: i2c@75b9000 {
 =09=09=09compatible =3D "qcom,i2c-qup-v2.2.1";
 =09=09=09reg =3D <0x75b9000 0x1000>;
--=20
2.32.0