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[23.128.96.18]) by mx.google.com with ESMTP id nb19si5952850ejc.87.2021.07.27.21.32.32; Tue, 27 Jul 2021 21:33:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@quicinc.com header.s=qcdkim header.b=Tb3ip3Dc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234177AbhG1Eau (ORCPT + 99 others); Wed, 28 Jul 2021 00:30:50 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:35713 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234048AbhG1Ear (ORCPT ); Wed, 28 Jul 2021 00:30:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1627446646; x=1658982646; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=AER5CHXg3NdjLXqRGWQm/QEcWLjWKJ+9+Fk2vCBGXzQ=; b=Tb3ip3DcQ6qWHEwjWpYyFxwoNe19Oe69JS5x7WGQutfJHHY1nT4fqnfE H5GfT2INlhcauNK4DWMQybHgAdljujM9aRwAMcHaeFKjvBz5RCKMViX26 ZXOv3FW35pDfmLQZ/BrvNVTDEFbDPjd1P2KTTeURr1fmT3hcZWz6w3vuY w=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-01.qualcomm.com with ESMTP; 27 Jul 2021 21:30:46 -0700 X-QCInternal: smtphost Received: from nasanexm03e.na.qualcomm.com ([10.85.0.48]) by ironmsg01-sd.qualcomm.com with ESMTP/TLS/AES256-SHA; 27 Jul 2021 21:30:46 -0700 Received: from fenglinw-gv.qualcomm.com (10.80.80.8) by nasanexm03e.na.qualcomm.com (10.85.0.48) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Tue, 27 Jul 2021 21:30:44 -0700 From: Fenglin Wu To: , , "Stephen Boyd" CC: , , Subject: [spmi-pmic-arb fixes and optimization patches V1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler Date: Wed, 28 Jul 2021 12:30:03 +0800 Message-ID: <1627446609-9064-4-git-send-email-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1627446609-9064-1-git-send-email-quic_fenglinw@quicinc.com> References: <1627446609-9064-1-git-send-email-quic_fenglinw@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanexm03g.na.qualcomm.com (10.85.0.49) To nasanexm03e.na.qualcomm.com (10.85.0.48) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Collins Check that the apid for an SPMI interrupt falls between the min_apid and max_apid that can be handled by the APPS processor before invoking the per-apid interrupt handler: periph_interrupt(). This avoids an access violation in rare cases where the status bit is set for an interrupt that is not owned by the APPS processor. Signed-off-by: David Collins Signed-off-by: Fenglin Wu --- drivers/spmi/spmi-pmic-arb.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index 4d7ad004..c4adc06 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -535,6 +535,12 @@ static void pmic_arb_chained_irq(struct irq_desc *desc) id = ffs(status) - 1; status &= ~BIT(id); apid = id + i * 32; + if (apid < pmic_arb->min_apid + || apid > pmic_arb->max_apid) { + WARN_ONCE(true, "spurious spmi irq received for apid=%d\n", + apid); + continue; + } enable = readl_relaxed( ver_ops->acc_enable(pmic_arb, apid)); if (enable & SPMI_PIC_ACC_ENABLE_BIT) -- Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.