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[23.128.96.18]) by mx.google.com with ESMTP id lr6si5848585ejb.129.2021.07.27.21.32.32; Tue, 27 Jul 2021 21:33:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@quicinc.com header.s=qcdkim header.b=WzK4WWzY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233766AbhG1Eao (ORCPT + 99 others); Wed, 28 Jul 2021 00:30:44 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:35713 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231952AbhG1Ean (ORCPT ); Wed, 28 Jul 2021 00:30:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1627446642; x=1658982642; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=TT6H1LTJc5D9BENIvvBWTikBFkwSSOsfTIGLszPVMv8=; b=WzK4WWzYMfqu3fL88gXdNJFaUaQD4euC8JNVWH6b+nCecNz9FFxxdw3W LGX26kbEZGn0aUTu9JVhyT8C5k0PkPLNPCXC3uHgEOShKOlbGIiXzTwRR Alfbzb3VJTBsX+Qosx7FCoGHwUbq9gZXz/0O2AyHLmikAWQ+RTi2xUqih w=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 27 Jul 2021 21:30:42 -0700 X-QCInternal: smtphost Received: from nasanexm03e.na.qualcomm.com ([10.85.0.48]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 27 Jul 2021 21:30:41 -0700 Received: from fenglinw-gv.qualcomm.com (10.80.80.8) by nasanexm03e.na.qualcomm.com (10.85.0.48) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Tue, 27 Jul 2021 21:30:39 -0700 From: Fenglin Wu To: , , "Stephen Boyd" CC: , , , Abhijeet Dharmapurikar Subject: [spmi-pmic-arb fixes and optimization patches V1 1/9] spmi: pmic-arb: add a print in cleanup_irq Date: Wed, 28 Jul 2021 12:30:01 +0800 Message-ID: <1627446609-9064-2-git-send-email-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1627446609-9064-1-git-send-email-quic_fenglinw@quicinc.com> References: <1627446609-9064-1-git-send-email-quic_fenglinw@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanexm03g.na.qualcomm.com (10.85.0.49) To nasanexm03e.na.qualcomm.com (10.85.0.48) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Abhijeet Dharmapurikar The cleanup_irq() was meant to clear and mask interrupts that were left enabled in the hardware but there was no interrupt handler registered for it. Add an error print when it gets invoked. Signed-off-by: Abhijeet Dharmapurikar Signed-off-by: David Collins Signed-off-by: Fenglin Wu --- drivers/spmi/spmi-pmic-arb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index bbbd311..295e19f 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -489,6 +489,8 @@ static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id) u8 per = ppid & 0xFF; u8 irq_mask = BIT(id); + dev_err_ratelimited(&pmic_arb->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n", + __func__, apid, sid, per, id); writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid)); if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid, -- Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.