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[23.128.96.18]) by mx.google.com with ESMTP id bu15si5034339ejb.164.2021.07.27.21.35.24; Tue, 27 Jul 2021 21:35:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@quicinc.com header.s=qcdkim header.b=h1Lrfwac; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234829AbhG1EbH (ORCPT + 99 others); Wed, 28 Jul 2021 00:31:07 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:35713 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234208AbhG1Ea7 (ORCPT ); Wed, 28 Jul 2021 00:30:59 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1627446658; x=1658982658; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=lXmE2bDOF4EwRGm8KjpM+LKJRtL4f/Jq6qA4zPZMTZY=; b=h1LrfwacALmYFAFOkWATbECiVZvgrc24jLyrryFxBe07cVD7XhIZwOHo BfXJM5rGfC1uTej9t1ukqUPU2fO4QnA60m7SvzfIcpcIAq3K5gzzG+vrh UqRuWW6L7yWIGmFIhSuwMieCBNsBhzi5fuhefj6QQJR1vcYHfIH6cU52l A=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-01.qualcomm.com with ESMTP; 27 Jul 2021 21:30:58 -0700 X-QCInternal: smtphost Received: from nasanexm03e.na.qualcomm.com ([10.85.0.48]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/AES256-SHA; 27 Jul 2021 21:30:58 -0700 Received: from fenglinw-gv.qualcomm.com (10.80.80.8) by nasanexm03e.na.qualcomm.com (10.85.0.48) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Tue, 27 Jul 2021 21:30:56 -0700 From: Fenglin Wu To: , , "Stephen Boyd" CC: , , Subject: [spmi-pmic-arb fixes and optimization patches V1 8/9] spmi: pmic-arb: make interrupt support optional Date: Wed, 28 Jul 2021 12:30:08 +0800 Message-ID: <1627446609-9064-9-git-send-email-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1627446609-9064-1-git-send-email-quic_fenglinw@quicinc.com> References: <1627446609-9064-1-git-send-email-quic_fenglinw@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanexm03g.na.qualcomm.com (10.85.0.49) To nasanexm03e.na.qualcomm.com (10.85.0.48) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Collins Make the support of PMIC peripheral interrupts optional for spmi-pmic-arb devices. This is useful in situations where SPMI address mapping is required without the need for IRQ support. Signed-off-by: David Collins Signed-off-by: Fenglin Wu --- drivers/spmi/spmi-pmic-arb.c | 45 +++++++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index 988204c..55fa981 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -1280,10 +1280,12 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) goto err_put_ctrl; } - pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq"); - if (pmic_arb->irq < 0) { - err = pmic_arb->irq; - goto err_put_ctrl; + if (of_find_property(pdev->dev.of_node, "interrupt-names", NULL)) { + pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq"); + if (pmic_arb->irq < 0) { + err = pmic_arb->irq; + goto err_put_ctrl; + } } err = of_property_read_u32(pdev->dev.of_node, "qcom,channel", &channel); @@ -1343,17 +1345,22 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) } } - dev_dbg(&pdev->dev, "adding irq domain\n"); - pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node, - &pmic_arb_irq_domain_ops, pmic_arb); - if (!pmic_arb->domain) { - dev_err(&pdev->dev, "unable to create irq_domain\n"); - err = -ENOMEM; - goto err_put_ctrl; + if (pmic_arb->irq > 0) { + dev_dbg(&pdev->dev, "adding irq domain\n"); + pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node, + &pmic_arb_irq_domain_ops, pmic_arb); + if (!pmic_arb->domain) { + dev_err(&pdev->dev, "unable to create irq_domain\n"); + err = -ENOMEM; + goto err_put_ctrl; + } + + irq_set_chained_handler_and_data(pmic_arb->irq, + pmic_arb_chained_irq, pmic_arb); + } else { + dev_dbg(&pdev->dev, "not supporting PMIC interrupts\n"); } - irq_set_chained_handler_and_data(pmic_arb->irq, pmic_arb_chained_irq, - pmic_arb); err = spmi_controller_add(ctrl); if (err) goto err_domain_remove; @@ -1361,8 +1368,10 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) return 0; err_domain_remove: - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); - irq_domain_remove(pmic_arb->domain); + if (pmic_arb->irq > 0) { + irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); + irq_domain_remove(pmic_arb->domain); + } err_put_ctrl: spmi_controller_put(ctrl); return err; @@ -1373,8 +1382,10 @@ static int spmi_pmic_arb_remove(struct platform_device *pdev) struct spmi_controller *ctrl = platform_get_drvdata(pdev); struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); spmi_controller_remove(ctrl); - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); - irq_domain_remove(pmic_arb->domain); + if (pmic_arb->irq > 0) { + irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); + irq_domain_remove(pmic_arb->domain); + } spmi_controller_put(ctrl); return 0; } -- Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.