Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp5275361pxv; Wed, 28 Jul 2021 07:12:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwPesiQyRzgvEJJWZU3j1wEbvjIq4CURDbeItVQat1AhQfXetz4U2Ob3oTt42U3b1ef2mYO X-Received: by 2002:a6b:f91a:: with SMTP id j26mr24126791iog.97.1627481574689; Wed, 28 Jul 2021 07:12:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627481574; cv=none; d=google.com; s=arc-20160816; b=O45nI6MEbl1bYUa43RrYVirDiNlDTMyHNDEYNGnDfvH8C6cDHrJlNpU8AmHd5lX/uZ ukpTib/RB7oHpO3Td/fV9Wr1bBoQXng7BehAry+esOP1HEkLk62aHIu14jTM97FFNnpo DkMswtdSjDiUIAarS/bdxd3ToMS/PMzZ93UVsSFuxm1MZla8zxoDetvGt8kugMiBoAUL XTrFxOEEwh07gWJtQoGdrb4E9T9jeejr8Mxi5EzWUUM19gM+XadPly/hNyFmiOPgR8+H Lp3UvKOmGsQz1zh5TtFqv8XT6oWYekIrbPNoA9KSkkneQ3a03xVCAlZnz/nbiIrt/iMF XbWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=dn7Kp73y2jWoHdQMYsqP+HDt7Jswx+VZ/Cd2d00WOak=; b=Ab6JAO7af3r0NNmAAW3aOlKTba7GMXJE5XdW2odLLNywXF9dTApfviwIXWVe1/MCN3 /lyQFop/z5ZL5u4lvvC85dkgo5j9i/zNJi1Goaa8fN6yC1g2xrl5hTxJP3gZy8jmUF2f NAu8it8JDNS4dXlDeUjW4THyVtJA1b86vFBGdeSH6CgdjspLgAERI4l/wLiqRdpw2fol gLY7vuCh5bAX+RenDS6UgDEzmQVJ1tTbT3BaoWa+bBs977F9oKpljDxD0/hYseWQa+ls bwC3gl5jOwPYsoQSjOOmUit3Sdm4MYWLEs4+AvPqc8tvXGFfP339R1PcQTzZ0B6xXn7I v4aQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=oDIUmU8r; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d24si53120iob.3.2021.07.28.07.12.43; Wed, 28 Jul 2021 07:12:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=oDIUmU8r; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236689AbhG1OKz (ORCPT + 99 others); Wed, 28 Jul 2021 10:10:55 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:49924 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236668AbhG1OKz (ORCPT ); Wed, 28 Jul 2021 10:10:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=dn7Kp73y2jWoHdQMYsqP+HDt7Jswx+VZ/Cd2d00WOak=; b=oDIUmU8rD1Z1i6GeQCvr9SAo2b op4tL38NAz23ewHcEPU8UnkGvI3vbXp0cQ873+q2r+zreVEB4JTlymNHLOkvyZc4Zmpw8+zCJERmi IKMZGsD0lniUXMd6+d9ed70GHGPOkiCcHI/ZKj8SsZAz9MoS7BiNR249pS/37fbTIM9U=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1m8kGl-00FB92-Q5; Wed, 28 Jul 2021 16:10:47 +0200 Date: Wed, 28 Jul 2021 16:10:47 +0200 From: Andrew Lunn To: Joakim Zhang Cc: davem@davemloft.net, kuba@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V2 net-next 5/7] net: fec: add MAC internal delayed clock feature support Message-ID: References: <20210728115203.16263-1-qiangqing.zhang@nxp.com> <20210728115203.16263-6-qiangqing.zhang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210728115203.16263-6-qiangqing.zhang@nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > + /* For rgmii internal delay, valid values are 0ps and 2000ps */ > + if (of_property_read_u32(np, "tx-internal-delay-ps", &rgmii_delay)) > + fep->rgmii_txc_dly = true; > + if (of_property_read_u32(np, "rx-internal-delay-ps", &rgmii_delay)) > + fep->rgmii_rxc_dly = true; I don't see any validation of the only supported values are 0ps and 2000ps. Andrew