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[23.128.96.18]) by mx.google.com with ESMTP id t5si1835139ile.92.2021.07.28.18.15.27; Wed, 28 Jul 2021 18:15:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@quicinc.com header.s=qcdkim header.b=Wy1UMKdw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233572AbhG2BOM (ORCPT + 99 others); Wed, 28 Jul 2021 21:14:12 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:64145 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233430AbhG2BOD (ORCPT ); Wed, 28 Jul 2021 21:14:03 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1627521241; x=1659057241; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=vWwEvArIAhoutDVPC+RAhs2Lierm8rahTWWjKXhsZnw=; b=Wy1UMKdwUQpkHPKchXgbm9HZquZslsgR1LNHWg3ur9siTtSe4g0X3QV+ kkDF7tJZ6+jTKUhXVr+ZyoR7vTo9D4FYv2jH+Mw5nqxLr4wGneg0uuPiR NKbDYkRkr6Z7unOSt5n2AjSkSv4T7DiBup9Ti+0+YKF83lm4GcnAVybPL o=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-01.qualcomm.com with ESMTP; 28 Jul 2021 18:14:01 -0700 X-QCInternal: smtphost Received: from nasanexm03e.na.qualcomm.com ([10.85.0.48]) by ironmsg01-sd.qualcomm.com with ESMTP/TLS/AES256-SHA; 28 Jul 2021 18:14:01 -0700 Received: from fenglinw-gv.qualcomm.com (10.80.80.8) by nasanexm03e.na.qualcomm.com (10.85.0.48) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Wed, 28 Jul 2021 18:13:59 -0700 From: Fenglin Wu To: , , CC: , , Subject: [PATCH V1 9/9] spmi: pmic-arb: increase SPMI transaction timeout delay Date: Thu, 29 Jul 2021 09:12:47 +0800 Message-ID: <1627521167-18848-10-git-send-email-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1627521167-18848-1-git-send-email-quic_fenglinw@quicinc.com> References: <1627521167-18848-1-git-send-email-quic_fenglinw@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanexm03e.na.qualcomm.com (10.85.0.48) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Collins Increase the SPMI transaction timeout delay from 100 us to 1000 us in order to account for the slower execution time found on some simulator targets. Signed-off-by: David Collins Signed-off-by: Fenglin Wu --- drivers/spmi/spmi-pmic-arb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index 55fa981..08c2566 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -91,7 +91,7 @@ enum pmic_arb_channel { /* Maximum number of support PMIC peripherals */ #define PMIC_ARB_MAX_PERIPHS 512 -#define PMIC_ARB_TIMEOUT_US 100 +#define PMIC_ARB_TIMEOUT_US 1000 #define PMIC_ARB_MAX_TRANS_BYTES (8) #define PMIC_ARB_APID_MASK 0xFF -- Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.