Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp5765672pxv; Wed, 28 Jul 2021 20:17:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzqLtXyLj2UBsgY8TD4e6bfgNFiooxd9mBortH+jdplbdDpqKC6+64DYx9az7CKOIVFLTMI X-Received: by 2002:a05:6638:39cd:: with SMTP id o13mr2617377jav.12.1627528626003; Wed, 28 Jul 2021 20:17:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627528625; cv=none; d=google.com; s=arc-20160816; b=hsiac763iy6T+8CwHVblaYE/IOd81t4cUoFXHSKEG3rns8lJFsPAQqziDAlY9sPxca KovR68tsSVjReQrDrG+xFSPzETygQvijn+4STDXr6J4CUmv/3EAgloN3Af3vO2PPfdUl ME2ALLf6gNbVDSDpAwve8ssKJWqxGymzSivjTHuyjfSKsZQcjZHjk3msvcZPcZXZqAnF xZEaiIzIEh6qNkwm5/4LRQCqwyF/K+9bipMYt76EIIPF+flfd5XIqlYCnS14xgK+kcl5 Bhw2d7Wj0SP4y1LPRlfEBO2BhQ4k2cB9ijq/t8LWPwzJFNoEZO4NcGrgv5blcJeb1xCn 7JDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=GEHpVphhyLJFXCEe7iQRjsD/9tyMnPNRqVbPlXIwLE4=; b=TXV1HI413CD0exU4J1ZZsP5Osb2Z4z8kjKI52X85oW2ZISOsOh8+X6xVdCgL8t+tOk yY6FihuQSfJbcSkQBkbf6IH0XI267IP9lKVFbrI+pUl18Yr0XX8LOMEPU4k5+IGeTrtl PrttBiUFsDW7I+cMFJqnLojrLNz1JNiyVW92tU+E11lr1YA7F6twToHNQP1NQCa38GlD j4/LLWWHvY3rD8zhzGzc/PiPo3BIITJF1xPwWCDCJRUNxRypj/vL0LCt/WbtwsRK/YHs QNXpQ1NDlfZkvMsLvP3r/1pOw4RASPuOL3hLnbTeViI0BIA1M5srtMEzcYByAMAB60EE gxbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=H90NoVLK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n26si1798654jam.80.2021.07.28.20.16.54; Wed, 28 Jul 2021 20:17:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=H90NoVLK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233559AbhG2DPw (ORCPT + 99 others); Wed, 28 Jul 2021 23:15:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233555AbhG2DPw (ORCPT ); Wed, 28 Jul 2021 23:15:52 -0400 Received: from mail-il1-x131.google.com (mail-il1-x131.google.com [IPv6:2607:f8b0:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C672FC061757 for ; Wed, 28 Jul 2021 20:15:49 -0700 (PDT) Received: by mail-il1-x131.google.com with SMTP id q18so4299169ile.9 for ; Wed, 28 Jul 2021 20:15:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=GEHpVphhyLJFXCEe7iQRjsD/9tyMnPNRqVbPlXIwLE4=; b=H90NoVLKUmuE48C1hAsE0ENepOFZRurynbwu4Ws/QA1jGVRagWYAhHGiC8+m2XW69W JA9fHV1GqZL6fM7sH2FKKneMMmwqYPo8v4iPz8hoSF6djxgc3bXBfUay/zJ28wLYWvpT vkll/a6MvrPvAukm8GFHf+MXXIuhOKhN/2AKk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=GEHpVphhyLJFXCEe7iQRjsD/9tyMnPNRqVbPlXIwLE4=; b=NR/1CejzW6aZQFBsFHIq3KvqpoCEXv4iVVVgdVt1ZUT+To3fsIGZ1yJMNBPPJ2HrP5 zIOqqpKdgIcgwB6qfzEW9pQuQb9Q8BsxVxE/TVGQsmCuGwuHakmr1uCF2U0nkqueiE8O XASp+/CJliQSSPwJrGHNUJnMmrJ8v6xpKBxSXC/5zoC64eJsLp2thUclE7pKuW/EdOGc 2leHMYMU6Ykc7BTREyITSnL91Hoi7MKKL/COJ20TtCJrhD84gg2TWTzhWNZLvmXUb+Sg fpX6VFjIkigxm5jM2AglsYqWDuzILLYRV/w0xFw4coC8HqWTuSlz3drayP7WwR2ZIFzt 3xiQ== X-Gm-Message-State: AOAM531H8IWU5JXgaajVpJx3FNKsw0MLThW2Kr2KwFp2JrLbniL6F3my aRUxTaFDwx5zFiuCK/spMg3ZahAn7oHbW9A6E+7qAg== X-Received: by 2002:a05:6e02:d8f:: with SMTP id i15mr2072719ilj.102.1627528549224; Wed, 28 Jul 2021 20:15:49 -0700 (PDT) MIME-Version: 1.0 References: <20210727174025.10552-1-linux@fw-web.de> In-Reply-To: <20210727174025.10552-1-linux@fw-web.de> From: Hsin-Yi Wang Date: Thu, 29 Jul 2021 11:15:23 +0800 Message-ID: Subject: Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes To: Frank Wunderlich Cc: "moderated list:ARM/Mediatek SoC support" , CK Hu , Matthias Brugger , Enric Balletbo i Serra , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , lkml , stable@vger.kernel.org, Frank Wunderlich Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 28, 2021 at 1:41 AM Frank Wunderlich wrote: > > From: CK Hu > > SOUT has many bits and need to be cleared before set new value. > Write only could do the clear, but for MOUT, it clears bits that > should not be cleared. So use a mask to reset only the needed bits. > > this fixes HDMI issues on MT7623/BPI-R2 since 5.13 > > Cc: stable@vger.kernel.org > Fixes: 440147639ac7 ("soc: mediatek: mmsys: Use an array for setting the routing registers") > Signed-off-by: Frank Wunderlich > Signed-off-by: CK Hu > --- > code is taken from here (upstreamed without mask part) > https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2345186/5 > basicly CK Hu's code so i set him as author > --- > drivers/soc/mediatek/mtk-mmsys.c | 7 +- > drivers/soc/mediatek/mtk-mmsys.h | 133 +++++++++++++++++++++---------- > 2 files changed, 98 insertions(+), 42 deletions(-) > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > index 080660ef11bf..0f949896fd06 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -68,7 +68,9 @@ void mtk_mmsys_ddp_connect(struct device *dev, > > for (i = 0; i < mmsys->data->num_routes; i++) > if (cur == routes[i].from_comp && next == routes[i].to_comp) { > - reg = readl_relaxed(mmsys->regs + routes[i].addr) | routes[i].val; > + reg = readl_relaxed(mmsys->regs + routes[i].addr); > + reg &= ~routes[i].mask; > + reg |= routes[i].val; > writel_relaxed(reg, mmsys->regs + routes[i].addr); > } > } > @@ -85,7 +87,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, > > for (i = 0; i < mmsys->data->num_routes; i++) > if (cur == routes[i].from_comp && next == routes[i].to_comp) { > - reg = readl_relaxed(mmsys->regs + routes[i].addr) & ~routes[i].val; > + reg = readl_relaxed(mmsys->regs + routes[i].addr); > + reg &= ~routes[i].mask; This patch is breaking the mt8183 internal display. I think it's because ~routes[i].val; is removed? Also what should the routes[i].mask be if it's not set in mmsys_mt8183_routing_table? > writel_relaxed(reg, mmsys->regs + routes[i].addr); > } > }