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From:   Hsin-Yi Wang <hsinyi@chromium.org>
Date:   Thu, 29 Jul 2021 13:58:17 +0800
Message-ID: <CAJMQK-iHfJWnGQRq299pZ9B9ABMsXPEkptyCrGtQqkEyc=HNFg@mail.gmail.com>
Subject: Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes
To:     Frank Wunderlich <linux@fw-web.de>
Cc:     "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>, CK Hu <ck.hu@mediatek.com>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Enric Balletbo i Serra <enric.balletbo@collabora.com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@lists.infradead.org>,
        lkml <linux-kernel@vger.kernel.org>, stable@vger.kernel.org,
        Frank Wunderlich <frank-w@public-files.de>
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On Thu, Jul 29, 2021 at 1:54 PM Frank Wunderlich <linux@fw-web.de> wrote:
>
> Am 29. Juli 2021 07:47:03 MESZ schrieb Hsin-Yi Wang <hsinyi@chromium.org>:
> >On Thu, Jul 29, 2021 at 1:40 PM Frank Wunderlich <linux@fw-web.de>
> >wrote:
> >>
> >
> >>
> > struct mtk_mmsys_routes {
> >         u32 from_comp;
> >         u32 to_comp;
> >         u32 addr;
> > +       u32 mask;
> >         u32 val;
> >  };
> >mask is not the last element, and mmsys_mt8183_routing_table = {
> >  {
> >    DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0,
> >    MT8183_DISP_OVL0_MOUT_EN, MT8183_OVL0_MOUT_EN_OVL0_2L
> >  }
> >...
> >so the mask and val will be wrong. CK, do you know what mask we should
> >set for mt8183? Or can we just set a dummy 0 mask.
>
> Ahhh...mt8183 has own mmsys-table and
> i had only changed the default one,so
> value is now missing because value is now the mask. I have used same order as
> CK to avoid confusion and make it easier
> to review.
> Afaik you could use same value as value to reset same bits...did this in default routing table too.
>
Should I create another patch based on this or can you help update the
mt8183 table in this patch?

Thanks

> regards Frank