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Date: Sat, 25 Nov 2006 08:58:51 -0800
From: Wink Saville <wink@saville.com>
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To: arjan@infradead.org
CC: Ingo Molnar <mingo@elte.hu>, Andi Kleen <ak@suse.de>,
       linux-kernel@vger.kernel.org, Andrew Morton <akpm@osdl.org>,
       Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [patch] x86: unify/rewrite SMP TSC sync code
References: <20061124170246.GA9956@elte.hu> <200611241813.13205.ak@suse.de>	 <20061124202514.GA7608@elte.hu>  <4567B0CC.4030802@saville.com> <1164443423.3147.51.camel@laptopd505.fenrus.org>
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Arjan van de Ven wrote:

<snip/>

> 
> so you can live with an occasional jump of seconds/minutes between
> threads? Or when a thread moves to another cpu?
> (yes on many PCs you won't see minutes, but on others you will)
> 

No that probably wouldn't be acceptable a few thousand ticks might be Ok.
How hard would be it possible to detect post facto what corrections might be needed
when? Maybe an event or FIFO that would provide correction information.

I would also assume we could request that a thread not migrate between CPU's
if it was critical and that could be a solution.

Would another alternative be to allow the thread to indicate when it was
ready to migrate and at these points the correction information could
be supplied/retrieved if desired.

Actually, we need to ask the CPU/System makers to provide a system wide
timer that is independent of the given CPU. I would expect it quite simple
for the coming generations of multi-core CPU's to provide a shared TSC.
For the multi-processor embedded work I have done we provided a memory
mapped counter that all processors could read, that worked quite well:)

Wink

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