Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
AI-Spam-Status: Not processed
Date:   Thu, 29 Jul 2021 21:04:21 +0800
From:   Icenowy Zheng <icenowy@aosc.io>
To:     Maxime Ripard <maxime@cerno.tech>
CC:     Andre Przywara <andre.przywara@arm.com>,
        Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Rob Herring <robh@kernel.org>,
        Samuel Holland <samuel@sholland.org>,
        linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com,
        linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
        Ondrej Jirman <megous@megous.com>,
        Alessandro Zummo <a.zummo@towertech.it>,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        linux-rtc@vger.kernel.org
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v7_06/19=5D_rtc=3A_sun6i=3A_Add_s?= =?US-ASCII?Q?upport_for_RTCs_without_external_LOSCs?=
User-Agent: K-9 Mail for Android
In-Reply-To: <20210729103228.prdav7eobi52y3ny@gilmour>
References: <20210615110636.23403-1-andre.przywara@arm.com> <20210615110636.23403-7-andre.przywara@arm.com> <20210616091431.6tm3zdf77p2x3upc@gilmour> <1e49692a2f4548ae942e170bc1ae9431a6eb512e.camel@aosc.io> <20210729103228.prdav7eobi52y3ny@gilmour>
Message-ID: <E4567E12-60C1-4DF5-89D6-C93DC3152D4F@aosc.io>
MIME-Version: 1.0
Content-Type: text/plain;
 charset=utf-8
Content-Transfer-Encoding: quoted-printable
Precedence: bulk


=E4=BA=8E 2021=E5=B9=B47=E6=9C=8829=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=886=
:32:28, Maxime Ripard <maxime@cerno=2Etech> =E5=86=99=E5=88=B0:
>On Thu, Jul 29, 2021 at 04:04:10PM +0800, Icenowy Zheng wrote:
>> =E5=9C=A8 2021-06-16=E6=98=9F=E6=9C=9F=E4=B8=89=E7=9A=84 11:14 +0200=EF=
=BC=8CMaxime Ripard=E5=86=99=E9=81=93=EF=BC=9A
>> > Hi,
>> >=20
>> > On Tue, Jun 15, 2021 at 12:06:23PM +0100, Andre Przywara wrote:
>> > > Some newer Allwinner RTCs (for instance the one in the H616 SoC)
>> > > lack
>> > > a pin for an external 32768 Hz oscillator=2E As a consequence, this
>> > > LOSC
>> > > can't be selected as the RTC clock source, and we must rely on the
>> > > internal RC oscillator=2E
>> > > To allow additions of clocks to the RTC node, add a feature bit to
>> > > ignore
>> > > any provided clocks for now (the current code would think this is
>> > > the
>> > > external LOSC)=2E Later DTs and code can then for instance add the
>> > > PLL
>> > > based clock input, and older kernel won't get confused=2E
>> > >=20
>> > > Signed-off-by: Andre Przywara <andre=2Eprzywara@arm=2Ecom>
>> >=20
>> > Honestly, I don't really know if it's worth it at this point=2E
>> >=20
>> > If we sums this up:
>> >=20
>> > =C2=A0- The RTC has 2 features that we use, mostly centered around 2
>> > =C2=A0=C2=A0 registers set plus a global one
>> >=20
>> > =C2=A0- Those 2 features are programmed in a completely different way
>> >=20
>> > =C2=A0- Even the common part is different, given the discussion aroun=
d the
>> > =C2=A0=C2=A0 clocks that we have=2E
>> >=20
>> > What is there to share in that driver aside from the probe, and maybe
>> > the interrupt handling? Instead of complicating this further with
>> > more
>> > special case that you were (rightfully) complaining about, shouldn't
>> > we
>> > just acknowledge the fact that it's a completely separate design and
>> > should be treated as such, with a completely separate driver?
>>=20
>> I think our problem is just that we're having a single driver for both
>> functionalities (clock manager and RTC)=2E
>>=20
>> Personally I don't think we should have seperated driver for clock
>> managers, although I am fine with seperated RTC driver for linear days=
=2E
>
>Why do you think it's a bad idea to have the RTC and clocks in the same
>driver?

Well you really misread, I'm just thinking we shouldn't have a new driver
from scratch=2E As we're going to have a single sun6i-rtc, please allow H6=
16
and R329 to enter it=2E

>
>Maxime