Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp6281432pxv; Thu, 29 Jul 2021 10:32:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzNK5w0x8d4TGr6jHbiFo1fE1C5AOjcsn56TRmG1HYRCdyIyQdY6RAJSjvUytXq0ldFaVPZ X-Received: by 2002:a17:907:2703:: with SMTP id w3mr3846625ejk.217.1627579953192; Thu, 29 Jul 2021 10:32:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627579953; cv=none; d=google.com; s=arc-20160816; b=LEzIX2OZNSaovxFoEAdQRUtnQ2XM5CKIclWW0VNG6mbgXvh8Kj/SwLGEhPUhwv15Ek vIWGcWn1lJzwfqJDoMzAcMhQ2xDjPYoV38YotbGc0Paf/Dotr397wTsNxEM65fE9XVQV WzBXIwLHyQFldn2h743eQoAlVNdYe/Qf0G0uurApQQFixwxtNXLFuQtE6VbAc0Dcq368 IWRAIofMyFmO/J+r7/uF7tvYWKABhWe/HKS5ulkoIvHlVfJsYulv/Y5NLMyHk0kno3in 81s6zakQg3gX7Sg5jHQXm/kYUzj39m0WWG7Gu9tvW7PMkEcbRAFTYWnp9lWfd/mTxDxl L+aA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Ae6d9pfFaSOFaLy1rJyaP4RqE3lAem9G0HoakdJJDVE=; b=RYL+7mpo2imFXu3uI54h4A2nJlwv2J13OJEFrpgwEBL3rKt1zCwwaWzfXenOppO6Ph AIQ3ITQrdUHHIYJMZ55bGU0jK0nnBY3B64ZOnnocfFw+6fNZJHBMfbsxah+m7704ppEY tqy5BAbkXGT2B/M805qtFWkd/zTt8Jsx/FmvVEM41MPWUEpBLyxHqcLREC+7HS89q1rV lYyQT7rgm5a2+g2rufEZ9Gj+sVkbwjJ5LM51NRoikRvft3pMORqfdXN7NhgFFRLd8fEM 7rgtzHHaJUaBsZbD04nf/LnFygrZyUqqCUmvrkrarIFpLWbW72o1DC6RVm9e9PsLPdc7 ngTw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bd6si3371565edb.119.2021.07.29.10.32.09; Thu, 29 Jul 2021 10:32:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232244AbhG2R2X (ORCPT + 99 others); Thu, 29 Jul 2021 13:28:23 -0400 Received: from foss.arm.com ([217.140.110.172]:53640 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232238AbhG2R2X (ORCPT ); Thu, 29 Jul 2021 13:28:23 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 87AED1FB; Thu, 29 Jul 2021 10:28:19 -0700 (PDT) Received: from merodach.members.linode.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EBEF03F73D; Thu, 29 Jul 2021 10:28:18 -0700 (PDT) From: James Morse To: linux-kernel@vger.kernel.org Cc: Thomas Gleixner , Marc Zyngier , Valentin Schneider Subject: [PATCH 1/2] irqchip/gic-v3: Add __gic_get_ppi_index() to find the PPI number from hwirq Date: Thu, 29 Jul 2021 17:27:47 +0000 Message-Id: <20210729172748.28841-2-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210729172748.28841-1-james.morse@arm.com> References: <20210729172748.28841-1-james.morse@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org gic_get_ppi_index() is a useful concept for ppi partitions, as the GIC has two PPI ranges but needs mapping to a single range when used as an index in the gic_data.ppi_descs[] array. Add a double-underscore version which takes just the intid. This will be used in the partition domain select and translate helpers to enable partition support for the EPPI range. Signed-off-by: James Morse --- drivers/irqchip/irq-gic-v3.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index e0f4debe64e1..b24f0a9d2876 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -446,18 +446,23 @@ static void gic_irq_set_prio(struct irq_data *d, u8 prio) writeb_relaxed(prio, base + offset + index); } -static u32 gic_get_ppi_index(struct irq_data *d) +static u32 __gic_get_ppi_index(irq_hw_number_t hwirq) { - switch (get_intid_range(d)) { + switch (__get_intid_range(hwirq)) { case PPI_RANGE: - return d->hwirq - 16; + return hwirq - 16; case EPPI_RANGE: - return d->hwirq - EPPI_BASE_INTID + 16; + return hwirq - EPPI_BASE_INTID + 16; default: unreachable(); } } +static u32 gic_get_ppi_index(struct irq_data *d) +{ + return __gic_get_ppi_index(d->hwirq); +} + static int gic_irq_nmi_setup(struct irq_data *d) { struct irq_desc *desc = irq_to_desc(d->irq); -- 2.30.2