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[209.85.219.179]) by smtp.gmail.com with ESMTPSA id t25sm28841qkt.11.2021.07.29.15.33.34 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Jul 2021 15:33:34 -0700 (PDT) Received: by mail-yb1-f179.google.com with SMTP id f26so12697767ybj.5 for ; Thu, 29 Jul 2021 15:33:34 -0700 (PDT) X-Received: by 2002:a25:6088:: with SMTP id u130mr9908544ybb.257.1627598013905; Thu, 29 Jul 2021 15:33:33 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Doug Anderson Date: Thu, 29 Jul 2021 15:33:22 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 00/24] iommu: Refactor DMA domain strictness To: Robin Murphy Cc: Joerg Roedel , Will Deacon , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , Linux ARM , LKML , suravee.suthikulpanit@amd.com, Lu Baolu , John Garry , Marek Szyprowski , Yoshihiro Shimoda , Geert Uytterhoeven , Yong Wu , Heiko Stuebner , Chunyan Zhang , Maxime Ripard , Jean-Philippe Brucker Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, Jul 28, 2021 at 8:59 AM Robin Murphy wrote: > > Hi all, > > Here's v2 where things start to look more realistic, hence the expanded > CC list. The patches are now based on the current iommu/core branch to > take John's iommu_set_dma_strict() cleanup into account. > > The series remiains in two (or possibly 3) logical parts - for people > CC'd on cookie cleanup patches, the later parts should not affect you > since your drivers don't implement non-strict mode anyway; the cleanup > is all pretty straightforward, but please do yell at me if I've managed > to let a silly mistake slip through and broken your driver. > > This time I have also build-tested x86 as well as arm64 :) > > Changes in v2: > > - Add iommu_is_dma_domain() helper to abstract flag check (and help > avoid silly typos like the one in v1). > - Tweak a few commit messages for spelling and (hopefully) clarity. > - Move the iommu_create_device_direct_mappings() update to patch #14 > where it should have been. > - Rewrite patch #20 as a conversion of the now-existing option. > - Clean up the ops->flush_iotlb_all check which is also made redundant > by the new domain type > - Add patch #24, which is arguably tangential, but it was something I > spotted during the rebase, so... > > Once again, the whole lot is available on a branch here: > > https://gitlab.arm.com/linux-arm/linux-rm/-/tree/iommu/fq > > Thanks, > Robin. > > > CC: Marek Szyprowski > CC: Yoshihiro Shimoda > CC: Geert Uytterhoeven > CC: Yong Wu > CC: Heiko Stuebner > CC: Chunyan Zhang > CC: Chunyan Zhang > CC: Maxime Ripard > CC: Jean-Philippe Brucker > > Robin Murphy (24): > iommu: Pull IOVA cookie management into the core > iommu/amd: Drop IOVA cookie management > iommu/arm-smmu: Drop IOVA cookie management > iommu/vt-d: Drop IOVA cookie management > iommu/exynos: Drop IOVA cookie management > iommu/ipmmu-vmsa: Drop IOVA cookie management > iommu/mtk: Drop IOVA cookie management > iommu/rockchip: Drop IOVA cookie management > iommu/sprd: Drop IOVA cookie management > iommu/sun50i: Drop IOVA cookie management > iommu/virtio: Drop IOVA cookie management > iommu/dma: Unexport IOVA cookie management > iommu/dma: Remove redundant "!dev" checks > iommu: Introduce explicit type for non-strict DMA domains > iommu/amd: Prepare for multiple DMA domain types > iommu/arm-smmu: Prepare for multiple DMA domain types > iommu/vt-d: Prepare for multiple DMA domain types > iommu: Express DMA strictness via the domain type > iommu: Expose DMA domain strictness via sysfs > iommu: Merge strictness and domain type configs > iommu/dma: Factor out flush queue init > iommu: Allow enabling non-strict mode dynamically > iommu/arm-smmu: Allow non-strict in pgtable_quirks interface > iommu: Only log strictness for DMA domains > > .../ABI/testing/sysfs-kernel-iommu_groups | 2 + > drivers/iommu/Kconfig | 80 +++++++++---------- > drivers/iommu/amd/iommu.c | 21 +---- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 25 ++++-- > drivers/iommu/arm/arm-smmu/arm-smmu.c | 29 ++++--- > drivers/iommu/arm/arm-smmu/qcom_iommu.c | 8 -- > drivers/iommu/dma-iommu.c | 44 +++++----- > drivers/iommu/exynos-iommu.c | 18 +---- > drivers/iommu/intel/iommu.c | 23 ++---- > drivers/iommu/iommu.c | 53 +++++++----- > drivers/iommu/ipmmu-vmsa.c | 27 +------ > drivers/iommu/mtk_iommu.c | 6 -- > drivers/iommu/rockchip-iommu.c | 11 +-- > drivers/iommu/sprd-iommu.c | 6 -- > drivers/iommu/sun50i-iommu.c | 12 +-- > drivers/iommu/virtio-iommu.c | 8 -- > include/linux/dma-iommu.h | 9 ++- > include/linux/iommu.h | 15 +++- > 18 files changed, 171 insertions(+), 226 deletions(-) I ran with: a) mainline Linux (at commit 4010a528219e) b) pulled iommu/next (at commit 9be9f5580ab6) c) picked from patchwork your series ...and I ran on sc7180-trogdor-lazor. Things worked OK and I could transition my eMMC to non-strict mode with: echo DMA-FQ > /sys/devices/platform/soc@0/7c4000.sdhci/iommu_group/type I was definitely getting some inconsistencies in my tests where the eMMC speeds were getting into a bad state, but I don't believe it's related to your patch series. I could transition myself back to strict DMA with this (only got one unrelated warn splat about dev_pm_opp_put_clkname when unbinding) because I was booted up from USB for testing: cd /sys/bus/mmc/drivers/mmcblk echo mmc1:0001 > unbind cd /sys/bus/platform/drivers/sdhci_msm/ echo 7c4000.sdhci > unbind echo DMA > /sys/devices/platform/soc@0/7c4000.sdhci/iommu_group/type echo 7c4000.sdhci > bind ...and it was consistently faster with non-strict than with strict so whatever bad state I sometimes managed to get in it affected both modes. ;-) So I guess that's a long-winded way to say this: Tested-by: Douglas Anderson