Received: by 2002:a05:6a10:1287:0:0:0:0 with SMTP id d7csp6801006pxv; Fri, 30 Jul 2021 02:43:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzW0riePE+1cE9jPEeCZBGCjRyBaAoi8V4pzCg0utNlEX8be/M8F5egc3I+1pRS6H5Vtwyp X-Received: by 2002:a02:a595:: with SMTP id b21mr1469115jam.122.1627638211262; Fri, 30 Jul 2021 02:43:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627638211; cv=none; d=google.com; s=arc-20160816; b=AkhCtxwO4zSMMeXocY9ez36Ta9wb1eRlv43o5zuAbCFn0BWGatO2JvdKDrAllTUAzE J6I0QPJD1pYzdl0zo4FfCUDKYH3xTiAU0zm10RkCHFq5d6ZExUxC6rGa5UXju/U4rZic Zha/KHLzefCDfI1QVnJht6q7Ft9K8rxcNYE81VdUyqyRTlKkzDyKcL+PY5VHuVfHIKgg ABARELe/STdZA2byVsURgHjCot5Ko31SrhsJ5lAKzNTBE7njAql2gfnLiTS0VYSwenIW KlrHp9ZxefHKPFcIRlQN95KAIIfnCJIk4fr9SKgXBIsnpwugjz5pXUXTQnyQdefn/vDq IgrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=PR1cMkAXLEST/sssLFieB8gQOFHMrTU8g2uYWV5VwTY=; b=WFD0omsZcPR77EK7IlQ1lTlm9Jm/IfZtNsUaDr9DcozVtXwdGT5qG0/SH/C//74C+D AttVhSO42TfQMzQE6vsLOT98ol7EATTnjlZs4uSQDMeev0ZnrjrE6S51t4/ddh5VGwhf UcQ0J2kOaTyUmVUBpyjC7pu0UcRYmv6oouSiduW7Z/9HdR8vzb78+KAhU7OKMBQ8AQfW T1DAhuE9tnxbB0d5Z9mhMloBRIUZQrgts3UhpoZL4h85/w4S+CgJbNciI1MRGRNRB4gN RuyYvUGhLGXtVDmyzJ1sYJsAskLjUu7tqPFk6fHMa8N8J+3FX7KeqdswFH6/rbcU7jWy z9oQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b9si1214543jal.24.2021.07.30.02.43.20; Fri, 30 Jul 2021 02:43:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238279AbhG3Jme (ORCPT + 99 others); Fri, 30 Jul 2021 05:42:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:53758 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230462AbhG3Jmb (ORCPT ); Fri, 30 Jul 2021 05:42:31 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 3741D603E9; Fri, 30 Jul 2021 09:42:25 +0000 (UTC) Date: Fri, 30 Jul 2021 10:42:22 +0100 From: Catalin Marinas To: Guangbin Huang Cc: davem@davemloft.net, kuba@kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dbrazdil@google.com, qperret@google.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lipeng321@huawei.com Subject: Re: [PATCH net-next 2/4] io: add function to flush the write combine buffer to device immediately Message-ID: <20210730094222.GB8570@arm.com> References: <1627614864-50824-1-git-send-email-huangguangbin2@huawei.com> <1627614864-50824-3-git-send-email-huangguangbin2@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1627614864-50824-3-git-send-email-huangguangbin2@huawei.com> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 30, 2021 at 11:14:22AM +0800, Guangbin Huang wrote: > From: Xiongfeng Wang > > Device registers can be mapped as write-combine type. In this case, data > are not written into the device immediately. They are temporarily stored > in the write combine buffer and written into the device when the buffer > is full. But in some situation, we need to flush the write combine > buffer to device immediately for better performance. So we add a general > function called 'flush_wc_write()'. We use DGH instruction to implement > this function for ARM64. Isn't this slightly misleading? IIUC DGH does not guarantee flushing, it just prevents writes merging (maybe this was already discussed on the previous RFC). -- Catalin