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[209.85.219.169]) by smtp.gmail.com with ESMTPSA id k15sm1653430qko.84.2021.07.30.15.20.46 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Jul 2021 15:20:46 -0700 (PDT) Received: by mail-yb1-f169.google.com with SMTP id z18so3506281ybg.8 for ; Fri, 30 Jul 2021 15:20:46 -0700 (PDT) X-Received: by 2002:a25:2904:: with SMTP id p4mr6090679ybp.276.1627683645881; Fri, 30 Jul 2021 15:20:45 -0700 (PDT) MIME-Version: 1.0 References: <1620807083-5451-1-git-send-email-sibis@codeaurora.org> <1620807083-5451-3-git-send-email-sibis@codeaurora.org> In-Reply-To: <1620807083-5451-3-git-send-email-sibis@codeaurora.org> From: Doug Anderson Date: Fri, 30 Jul 2021 15:20:34 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 2/2] arm64: dts: qcom: sc7280: Add cpu OPP tables To: Sibi Sankar Cc: Bjorn Andersson , Matthias Kaehlcke , Viresh Kumar , Stephen Boyd , Andy Gross , Rob Herring , "Rafael J. Wysocki" , linux-arm-msm , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , Linux PM Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, May 12, 2021 at 1:11 AM Sibi Sankar wrote: > > Add OPP tables required to scale DDR/L3 per freq-domain on SC7280 SoCs. > > Reviewed-by: Douglas Anderson > Signed-off-by: Sibi Sankar > --- > > V3: > * Rename cpu opp table nodes [Matthias] > * Rename opp phandles [Doug] > > Depends on the following patch series: > L3 Provider Support: https://lore.kernel.org/lkml/1618556290-28303-1-git-send-email-okukatla@codeaurora.org/ > CPUfreq Support: https://lore.kernel.org/lkml/1618020280-5470-2-git-send-email-tdas@codeaurora.org/ > RPMH Provider Support: https://lore.kernel.org/lkml/1619517059-12109-1-git-send-email-okukatla@codeaurora.org/ > > It also depends on L3 and cpufreq dt nodes from the ^^ series to not have > overlapping memory regions. > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 215 +++++++++++++++++++++++++++++++++++ > 1 file changed, 215 insertions(+) I see patch #1 in mainline now. Does that mean it's time to land patch #2 in the Qualcomm tree now? ...or maybe it needs to be re-posted? -Doug