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[23.128.96.18]) by mx.google.com with ESMTP id v15si4913459jas.5.2021.07.31.00.14.39; Sat, 31 Jul 2021 00:14:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@canonical.com header.s=20210705 header.b=B0PAP61X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=canonical.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230240AbhGaHMb (ORCPT + 99 others); Sat, 31 Jul 2021 03:12:31 -0400 Received: from smtp-relay-canonical-0.canonical.com ([185.125.188.120]:40346 "EHLO smtp-relay-canonical-0.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230250AbhGaHM2 (ORCPT ); Sat, 31 Jul 2021 03:12:28 -0400 Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-0.canonical.com (Postfix) with ESMTPS id E68083F233 for ; Sat, 31 Jul 2021 07:12:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1627715539; bh=hN6QfGvmrSwTg4tA4I3radaavpm+Sqfgu2IG+IjJCBU=; h=Subject:To:Cc:References:From:Message-ID:Date:MIME-Version: In-Reply-To:Content-Type; b=B0PAP61XUWJZhkjQiJoFJ6o2+qyJG6f+RbTMjUZ+8LptRgw/A340uWzzIkCh2ZIA6 clw14io+hbIdgN7k7OEGBZ3ntQq+43eecoMqzqMTkhEVJbJ0WzdP06UimgNTVINHQn Aui4gWYVpuRPy2v9LfjcG6G/05xOfpjDaP69dFKpdAtcIEEAHpxuODK2BlJfg09a1u pVoa70KGHRP3MmzBPPOApkiSE0XT8dYcVtNaLifH5YnbvgGjPF3aQro4XKTfOQpTmB yFFcDA1kHzCg4CKw8msRIYJ+ICR0I8MFXQ8q40MEbI+O5m3u9wrrLlZqA2LcTCpgTa BuUQQwE2YQPLw== Received: by mail-ed1-f70.google.com with SMTP id x1-20020a05640218c1b02903bc7f97f858so4152305edy.2 for ; Sat, 31 Jul 2021 00:12:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=hN6QfGvmrSwTg4tA4I3radaavpm+Sqfgu2IG+IjJCBU=; b=s4xKd70DZII68437tBpUW+uVx24fcLf5DFsWKPcf8sgxh45LbTJvxO7i3YoIEfioG+ fEDNm75AUOk0xQTFmSujVIs8LZDG3nPwqsjF5r+IW8Dnn0W4fDNy3mrYIGBy1UIwjC9s BWukKB+IYJRJJI7sL+rdAAB8H2S72g6s3+IjJ7EzebZ9IdBEDKrYfvT8TFOnUUUMmuqV C4SUrg6lYlPoLj90WdmgHrqpuILduESzfmr8o3VKH1ARAsmFXaSyAHyE0cylyJVKOC2c GBkj7iePelAk9YyyFQg5DgGPimy51BC2gkNI+FAqpsBhzc+9G4ysAO92Arpx20sknY9C NwEA== X-Gm-Message-State: AOAM5310KJjEmgkySrjJXf4pZdeY0JHVdx0PtQ9wV5b3EMQfPDK1PVda JXmY9vASIq89dfBBkLNrSpxqZdKgVAu9M5k1njnPo/+sP1YxFGzJnMVxkoCYlO3XAxMndVOan/+ rPfh4QbYiQm1uNx7bGD5lbjA0gYXlOVbkO28nMxu3PA== X-Received: by 2002:a50:da0e:: with SMTP id z14mr7925684edj.73.1627715537253; Sat, 31 Jul 2021 00:12:17 -0700 (PDT) X-Received: by 2002:a50:da0e:: with SMTP id z14mr7925659edj.73.1627715537087; Sat, 31 Jul 2021 00:12:17 -0700 (PDT) Received: from [192.168.8.102] ([86.32.47.9]) by smtp.gmail.com with ESMTPSA id l2sm1339054ejg.37.2021.07.31.00.12.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 31 Jul 2021 00:12:16 -0700 (PDT) Subject: Re: [PATCH 06/12] tty: serial: samsung: Add Exynos850 SoC data To: Sam Protsenko Cc: Sylwester Nawrocki , Chanwoo Choi , Linus Walleij , Tomasz Figa , Rob Herring , Stephen Boyd , Michael Turquette , Jiri Slaby , Greg Kroah-Hartman , Charles Keepax , Ryu Euiyoul , Tom Gall , Sumit Semwal , John Stultz , Amit Pundir , devicetree , linux-arm Mailing List , linux-clk , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List , Linux Samsung SOC , "open list:SERIAL DRIVERS" References: <20210730144922.29111-1-semen.protsenko@linaro.org> <20210730144922.29111-7-semen.protsenko@linaro.org> <5826bc3e-e9e8-a9bb-4541-21c1b944a60e@canonical.com> From: Krzysztof Kozlowski Message-ID: <3b607569-e97a-9f1b-92a2-a28de5d0e6b6@canonical.com> Date: Sat, 31 Jul 2021 09:12:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 31/07/2021 01:10, Sam Protsenko wrote: > On Fri, 30 Jul 2021 at 19:05, Krzysztof Kozlowski > wrote: >> >> On 30/07/2021 16:49, Sam Protsenko wrote: >>> Add serial driver data for Exynos850 SoC. This driver data is basically >>> reusing EXYNOS_COMMON_SERIAL_DRV_DATA, which is common for all Exynos >>> chips, but also enables USI init, which was added in previous commit: >>> "tty: serial: samsung: Init USI to keep clocks running". >>> >>> Signed-off-by: Sam Protsenko >>> --- >>> drivers/tty/serial/samsung_tty.c | 13 +++++++++++++ >>> 1 file changed, 13 insertions(+) >>> >>> diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c >>> index 75ccbb08df4a..d059b516a0f4 100644 >>> --- a/drivers/tty/serial/samsung_tty.c >>> +++ b/drivers/tty/serial/samsung_tty.c >>> @@ -2814,11 +2814,19 @@ static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = { >>> .fifosize = { 64, 256, 16, 256 }, >>> }; >>> >>> +static struct s3c24xx_serial_drv_data exynos850_serial_drv_data = { >>> + EXYNOS_COMMON_SERIAL_DRV_DATA_USI(1), >>> + .fifosize = { 0, }, >> >> This does not look correct. You rely on samsung,uart-fifosize property >> but it is optional. >> > > Good point. I will replace fifosize elements (in patch series v2) with > this code (the reasoning is below): > > .fifosize = { 256, 64, 64, 64 } > > TRM mentions that USI block has configurable FIFO of 16/32/64/128/256 > byte. In vendor kernel they are setting default values in dtsi instead > of driver, that's where fifosize = { 0 } appeared from. And in vendor > dtsi they set 256 for serial_0 (USI UART instance), 64 for serial_1 > (CMGP0 UART instance) and 64 for serial_2 (CMGP1 UART instance). I > tested 256 and 64 for serial_0 (which is used for serial console) > > As for fifosize array elements count: though it's possible to > configure up to 7 UARTs in Exynos850 (it has 5 USI blocks and 2 CMGP > blocks, which can be configured as USIs), in a regular case it's only > 3 UARTs (1 in USI and 2 in CMGP). This is how it's done in vendor's > device tree, and I doubt someone is going to need more than 3 serials > anyway, looks like very specific case for a mobile SoC. But > CONFIG_SERIAL_SAMSUNG_UARTS_4=y is set by default when using arm64 > defconfig, and I'd like to keep minimal delta for this defconfig for > now. > > Hope you are ok with this? > Yes, sounds good. Best regards, Krzysztof