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References: <20210729170737.21424-1-jason-jh.lin@mediatek.com> <20210729170737.21424-2-jason-jh.lin@mediatek.com>
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From:   Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date:   Sun, 1 Aug 2021 08:36:54 +0800
Message-ID: <CAAOTY_9sasTb=W3Kkhx-UZ-ATSe_ge8A14pmOHFCOQjag89r0Q@mail.gmail.com>
Subject: Re: [PATCH v5 1/6] arm64: dts: mt8195: add display node for vdosys0
To:     "jason-jh.lin" <jason-jh.lin@mediatek.com>
Cc:     Rob Herring <robh+dt@kernel.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Chun-Kuang Hu <chunkuang.hu@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Enric Balletbo i Serra <enric.balletbo@collabora.com>,
        fshao@chromium.org, David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Hsin-Yi Wang <hsinyi@chromium.org>,
        Yongqiang Niu <yongqiang.niu@mediatek.com>,
        Nancy Lin <nancy.lin@mediatek.com>, singo.chang@mediatek.com,
        DTML <devicetree@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        DRI Development <dri-devel@lists.freedesktop.org>
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Hi, Jason:

jason-jh.lin <jason-jh.lin@mediatek.com> =E6=96=BC 2021=E5=B9=B47=E6=9C=883=
0=E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8A=E5=8D=881:07=E5=AF=AB=E9=81=93=EF=
=BC=9A
>
> Add display node for vdosys0.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
> This patch is based on [1][2][3][4]
>
> [1]arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makef=
ile
> - https://patchwork.kernel.org/project/linux-mediatek/patch/2021060107535=
0.31515-2-seiya.wang@mediatek.com/
> [2]arm64: dts: mt8195: add IOMMU and smi nodes
> - https://patchwork.kernel.org/project/linux-mediatek/patch/2021061517323=
3.26682-15-tinghan.shen@mediatek.com/
> [3]arm64: dts: mt8195: add gce node
> - https://patchwork.kernel.org/project/linux-mediatek/patch/2021070505342=
9.4380-4-jason-jh.lin@mediatek.com/
> [4]add mt8195 SoC DRM binding
> - https://patchwork.kernel.org/project/linux-mediatek/list/?series=3D5195=
97
> ---
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 112 +++++++++++++++++++++++
>  1 file changed, 112 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/d=
ts/mediatek/mt8195.dtsi
> index 04d3e95175fa..4fa47cb2bede 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1155,9 +1155,121 @@
>                         #clock-cells =3D <1>;
>                 };
>

[snip]

> +
> +               merge0: disp_vpp_merge0@1c014000 {
> +                       compatible =3D "mediatek,mt8195-disp-merge";
> +                       reg =3D <0 0x1c014000 0 0x1000>;
> +                       interrupts =3D <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0=
>;
> +                       power-domains =3D <&spm MT8195_POWER_DOMAIN_VDOSY=
S0>;
> +                       clocks =3D <&vdosys0 CLK_VDO0_VPP_MERGE0>;

Why this merge has no async clock?

Regards,
Chun-Kuang.

> +                       mediatek,gce-client-reg =3D
> +                                <&gce1 SUBSYS_1c01XXXX 0x4000 0x1000>;
> +               };
> +