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Mon, 2 Aug 2021 02:49:45 +0000 From: "Tian, Kevin" To: Jason Gunthorpe , David Gibson CC: "Alex Williamson (alex.williamson@redhat.com)" , Jean-Philippe Brucker , Jason Wang , "parav@mellanox.com" , "Enrico Weigelt, metux IT consult" , Paolo Bonzini , Shenming Lu , Joerg Roedel , Eric Auger , Jonathan Corbet , "Raj, Ashok" , "Liu, Yi L" , "Wu, Hao" , "Jiang, Dave" , Jacob Pan , Kirti Wankhede , "Robin Murphy" , "kvm@vger.kernel.org" , "iommu@lists.linux-foundation.org" , "David Woodhouse" , LKML , "Lu Baolu" Subject: RE: [RFC v2] /dev/iommu uAPI proposal Thread-Topic: [RFC v2] /dev/iommu uAPI proposal Thread-Index: Add0lrMH87IsTsl5Rp6WN1oQU6kGMQNQxoYAAN4kDIAAfDtbgA== Date: Mon, 2 Aug 2021 02:49:44 +0000 Message-ID: References: <20210730145123.GW1721383@nvidia.com> In-Reply-To: <20210730145123.GW1721383@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.5.1.3 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: nvidia.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5433.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 65f6dafc-f0d6-4bde-b96a-08d955602f69 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2021 02:49:44.8403 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Q7E0Xf9LY2cW31wX+fYrbAP4xixD0BT5fF/ENp+7MrPGx0QZA+ayFxPnP86tZ0kTMzI5P4Xb9p8YcDMUp7PIXA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB2018 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Jason Gunthorpe > Sent: Friday, July 30, 2021 10:51 PM >=20 > On Mon, Jul 26, 2021 at 02:50:48PM +1000, David Gibson wrote: >=20 > > That said, I'm still finding the various ways a device can attach to > > an ioasid pretty confusing. Here are some thoughts on some extra > > concepts that might make it easier to handle [note, I haven't thought > > this all the way through so far, so there might be fatal problems with > > this approach]. >=20 > I think you've summarized how I've been viewing this problem. All the > concepts you pointed to should show through in the various APIs at the > end, one way or another. I still didn't get the value of making endpoint explicit in /dev/iommu uAPI= .=20 From IOMMU p.o.v it only cares how to route incoming DMA traffic to a specific I/O page table, according to RID or RID+PASID info carried in DMA= =20 packets. This has been covered by this proposal. Which DMA endpoint in=20 the source device actually triggers the traffic is not a matter for /dev/io= mmu... >=20 > How much we need to expose to userspace, I don't know. >=20 > Does userspace need to care how the system labels traffic between DMA > endpoint and the IOASID? At some point maybe yes since stuff like > PASID does leak out in various spots >=20 Can you elaborate? IMO the user only cares about the label (device cookie=20 plus optional vPASID) which is generated by itself when doing the attaching call, and expects this virtual label being used in various spots (invalidat= ion, page fault, etc.). How the system labels the traffic (the physical RID or R= ID+ PASID) should be completely invisible to userspace. Thanks Kevin